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Re: ALPHA instruction timing
- From: Ark Degtiarov <adegtiar mediaone net>
- To: axp-list redhat com
- Subject: Re: ALPHA instruction timing
- Date: Thu, 10 Dec 1998 12:12:05 -0500
I would love to get it too.
Ark
Thorsten Koch wrote:
>
> Hi,
>
> I'm trying to write a little optimized assember routine.
>
> Some experiments showed me that the order of the instructions
> is very important.
>
> (Using a fetch instruction and moving 16 stores a little back
> from the point were the register they store was modified,
> made the routine 22 % faster.)
>
> Can somebody hint me a document (netwise) were I find the
> instructions timings for the EV56 aka 21164A processors,
> including the penalties for whatever the processor does
> not like?
>
> Thanks in advance,
> Thorsten
>
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