Re: How to upload compiled packages?

[Alan Young <ayoung teleport com>]

Matt Turner wrote:
> Saying EV5 won't run EV6 binaries is like saying Pentium II won't run
> Pentium III binaries. The only reason a PII wouldn't run a PIII binary
> is if the binary used instructions available on PIII but not PII, SSE
> for example. This is totally analogous to BWX or MVI extensions.

Right.

> There's no such thing as an 'in order binary' or an 'out of order
> binary'. That concept is something much more low level than even
> machine code. Out of the realm of compiler optimization.

Maybe.  The 21264 Compiler Writer's Guide recommends that compilers 
generate their code as if it was for a in-order microprocessor.  It 
doesn't mean that a compiler or some one writing some really crafty 
assembly has to.

> Here is an article that speaks of PALcode emulation of MVI
> instructions. See the third paragraph.
> http://www.alphant.com/articles/MVI.html

The problem is that the old systems never had their firmware upgraded to 
trap and emulate the instruction extensions in PALcode.  There was at 
one time a kernel patch floating around that would trap the BWX 
instructions and emulate them at the kernel level.  I don't know if that 
ever got merged with the mainstream kernel tho.  I think the performance 
of the trapped instructions was not that great either.

> Search for 'ALPHA16' on this page. http://www.faqs.org/faqs/dec-faq/vms/part5/
> Note it states
>
>   The Alpha architecture is upward- and downward-compatible, and newer
>   instructions are emulated on older platforms, for those cases where
>   the compiler is explicitly requested to generate the newer Alpha
>   instructions.

Read the next paragraph of the FAQ...

  In particular, OpenVMS Alpha V7.1 and later include the instruction
  emulation capabilities necessary for the execution of newer Alpha
  instructions on older Alpha microprocessors.

The instructions are being trapped and emulated by the OpenVMS kernel.

In lieu of a kernel trapping the instructions, smart programs using the 
newer extensions and expecting to run on older processors are supposed 
to issue the AMASK instruction at program initialization and alter their 
code paths accordingly - one for the new instructions and one without. 
Just like a x86 program would check the processor flags for CMOV, MMX, 
3Dnow, SSE, etc.

AFAIK, GCC generates one in-order code flow and the instructions used 
are based on the -march switch and whether or not the code generator 
decides to emit a extended instruction for a object.  So yes, you could 
compile something with -march ev67 and it might run on a 21064.  It will 
run if BWX, CIX, FIX, or MVI instructions are not generated by the compiler.

Alan