rpms/kernel/FC-3 jwltest-pci-enable-d3hot.patch,1.1.4.1,1.1.4.2

[fedora-cvs-commits at redhat.com]

Author: linville

Update of /cvs/dist/rpms/kernel/FC-3
In directory cvs.devel.redhat.com:/tmp/cvs-serv4318

Modified Files:
      Tag: private-linville-fc3-jwltest-18-branch
	jwltest-pci-enable-d3hot.patch 
Log Message:


jwltest-pci-enable-d3hot.patch:
 pci.c |   49 ++++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 48 insertions(+), 1 deletion(-)

Index: jwltest-pci-enable-d3hot.patch
===================================================================
RCS file: /cvs/dist/rpms/kernel/FC-3/Attic/jwltest-pci-enable-d3hot.patch,v
retrieving revision 1.1.4.1
retrieving revision 1.1.4.2
diff -u -r1.1.4.1 -r1.1.4.2
--- jwltest-pci-enable-d3hot.patch	1 Jul 2005 00:21:18 -0000	1.1.4.1
+++ jwltest-pci-enable-d3hot.patch	1 Jul 2005 00:34:25 -0000	1.1.4.2
@@ -1,26 +1,60 @@
---- linux-2.6.11/drivers/pci/pci.c.orig	2005-06-27 17:41:01.973400972 -0400
-+++ linux-2.6.11/drivers/pci/pci.c	2005-06-27 17:42:59.190780196 -0400
-@@ -400,11 +400,22 @@ pci_enable_device_bars(struct pci_dev *d
+--- linux-2.6.11/drivers/pci/pci.c.orig	2005-06-30 20:22:17.881323484 -0400
++++ linux-2.6.11/drivers/pci/pci.c	2005-06-30 20:30:32.899386557 -0400
+@@ -381,9 +381,56 @@ pci_restore_state(struct pci_dev *dev)
  int
- pci_enable_device(struct pci_dev *dev)
+ pci_enable_device_bars(struct pci_dev *dev, int bars)
  {
 -	int err;
-+	int i, err;
++	int i, numres, err;
  
- 	dev->is_enabled = 1;
- 	if ((err = pci_enable_device_bars(dev, (1 << PCI_NUM_RESOURCES) - 1)))
- 		return err;
+ 	pci_set_power_state(dev, PCI_D0);
 +
-+	/* Some devices loose PCI config header data during D3hot->D0
-+	   transition.  Since some firmware leaves devices in D3hot
++	/* Some devices lose PCI config header data during D3hot->D0
++	   transition.	Since some firmware leaves devices in D3hot
 +	   state at boot, this information needs to be restored.  We
 +	   could force drivers to do this, but better to leave them
 +	   ignorant of PCI PM trivia...
 +	*/
-+	for (i = 0; i < 6; i ++)
-+		pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + (i * 4),
-+		                       dev->resource[i].start);
++	switch (dev->hdr_type) {
++	case PCI_HEADER_TYPE_NORMAL:
++		numres = 6;
++		break;
++	case PCI_HEADER_TYPE_BRIDGE:
++		numres = 2;
++		break;
++	case PCI_HEADER_TYPE_CARDBUS:
++		numres = 1;
++		break;
++	default:
++		/* Should never get here, but just in case... */
++		numres = 0;
++		break;
++	}
++	for (i = 0; i < numres; i ++) {
++		struct pci_bus_region region;
++		u32 val;
++		int reg;
++
++		if (!dev->resource[i].flags)
++			continue;
++
++		pcibios_resource_to_bus(dev, &region, &dev->resource[i]);
++
++		val = region.start
++		    | (dev->resource[i].flags & PCI_REGION_FLAG_MASK);
 +
- 	pci_fixup_device(pci_fixup_enable, dev);
++		reg = PCI_BASE_ADDRESS_0 + (i * 4);
++
++		pci_write_config_dword(dev, reg, val);
++
++		if ((val & (PCI_BASE_ADDRESS_SPACE
++		          | PCI_BASE_ADDRESS_MEM_TYPE_MASK))
++		 == (PCI_BASE_ADDRESS_SPACE_MEMORY
++		   | PCI_BASE_ADDRESS_MEM_TYPE_64)) {
++			pci_write_config_dword(dev, reg + 4, 0);
++		}
++	}
++
+ 	if ((err = pcibios_enable_device(dev, bars)) < 0)
+ 		return err;
  	return 0;
- }