rpms/xorg-x11/devel xorg-x11-6.8.2-use-linux-native-pciscan-by-default.patch, 1.3, 1.4 xorg-x11.spec, 1.218, 1.219

fedora-cvs-commits at redhat.com fedora-cvs-commits at redhat.com
Wed Jul 27 21:03:09 UTC 2005


Author: krh

Update of /cvs/dist/rpms/xorg-x11/devel
In directory cvs.devel.redhat.com:/tmp/cvs-serv5267

Modified Files:
	xorg-x11-6.8.2-use-linux-native-pciscan-by-default.patch 
	xorg-x11.spec 
Log Message:
* Wed Jul 27 2005 Kristian Høgsberg <krh at redhat.com> 6.8.2-44
- Update xorg-x11-6.8.2-use-linux-native-pciscan-by-default.patch to
  fix all occurrences of direct PCI config space access.



xorg-x11-6.8.2-use-linux-native-pciscan-by-default.patch:
 helper_exec.c |  104 +++++++++++++++++++++++++++++++++++++++++++++++++---------
 1 files changed, 89 insertions(+), 15 deletions(-)

Index: xorg-x11-6.8.2-use-linux-native-pciscan-by-default.patch
===================================================================
RCS file: /cvs/dist/rpms/xorg-x11/devel/xorg-x11-6.8.2-use-linux-native-pciscan-by-default.patch,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- xorg-x11-6.8.2-use-linux-native-pciscan-by-default.patch	6 May 2005 01:53:42 -0000	1.3
+++ xorg-x11-6.8.2-use-linux-native-pciscan-by-default.patch	27 Jul 2005 21:02:36 -0000	1.4
@@ -2,6 +2,9 @@
 which changes the X server to use Linux native /proc based PCI
 interfaces by default instead of bitbanging PCI config space directly.
 
+Patch updated by Olivier Baudron <olivier.baudron at m4x.org> to fix all
+occurrences of PCI config space access.
+
 This fixes a problem in Linux where other software may be probing PCI
 config space using the native interfaces correctly and the kernel PCI
 lock is held, then the X server starts up and simultaneously stomps on
@@ -24,9 +27,9 @@
 	https://bugs.freedesktop.org/show_bug.cgi?id=2880
 
 
---- xc/programs/Xserver/hw/xfree86/int10/helper_exec.c.ORIG	2002-11-25 16:05:49.000000000 -0500
-+++ xc/programs/Xserver/hw/xfree86/int10/helper_exec.c	2005-03-31 14:38:01.000000000 -0500
-@@ -23,10 +23,8 @@
+--- xc/programs/Xserver/hw/xfree86/int10/helper_exec.c.use-linux-native-pciscan-by-default	2004-04-23 15:54:06.000000000 -0400
++++ xc/programs/Xserver/hw/xfree86/int10/helper_exec.c	2005-07-27 16:41:26.000000000 -0400
+@@ -23,10 +23,12 @@
  #include "int10Defines.h"
  #include "xf86int10.h"
  
@@ -34,10 +37,54 @@
  static int pciCfg1in(CARD16 addr, CARD32 *val);
  static int pciCfg1out(CARD16 addr, CARD32 val);
 -#endif
++static int pciCfg1inw(CARD16 addr, CARD16 *val);
++static int pciCfg1outw(CARD16 addr, CARD16 val);
++static int pciCfg1inb(CARD16 addr, CARD8 *val);
++static int pciCfg1outb(CARD16 addr, CARD8 val);
  #if defined (_PC)
  static void SetResetBIOSVars(xf86Int10InfoPtr pInt, Bool set);
  #endif
-@@ -396,10 +394,8 @@
+@@ -321,7 +323,8 @@
+ 	}
+ #endif /* __NOT_YET__ */
+     } else {
+-	val = inb(Int10Current->ioBase + port);
++	if (!pciCfg1inb(port, &val))
++	    val = inb(Int10Current->ioBase + port);
+ #ifdef PRINT_PORT
+ 	ErrorF(" inb(%#x) = %2.2x\n", port, val);
+ #endif
+@@ -343,7 +346,8 @@
+ 	(void)getsecs(&sec, &usec);
+ 	val = (CARD16)(usec / 3);
+     } else {
+-	val = inw(Int10Current->ioBase + port);
++	if (!pciCfg1inw(port, &val))
++	    val = inw(Int10Current->ioBase + port);
+     }
+ #ifdef PRINT_PORT
+     ErrorF(" inw(%#x) = %4.4x\n", port, val);
+@@ -380,7 +384,8 @@
+ #ifdef PRINT_PORT
+ 	ErrorF(" outb(%#x, %2.2x)\n", port, val);
+ #endif
+-	outb(Int10Current->ioBase + port, val);
++	if (!pciCfg1outb(port, val))
++	    outb(Int10Current->ioBase + port, val);
+     }
+ }
+ 
+@@ -391,7 +396,8 @@
+     ErrorF(" outw(%#x, %4.4x)\n", port, val);
+ #endif
+ 
+-    outw(Int10Current->ioBase + port, val);
++    if (!pciCfg1outw(port, val))
++	outw(Int10Current->ioBase + port, val);
+ }
+ 
+ CARD32
+@@ -399,10 +405,8 @@
  {
      CARD32 val;
  
@@ -49,7 +96,7 @@
  
  #ifdef PRINT_PORT
      ErrorF(" inl(%#x) = %8.8x\n", port, val);
-@@ -414,10 +410,8 @@
+@@ -417,10 +421,8 @@
      ErrorF(" outl(%#x, %8.8x)\n", port, val);
  #endif
  
@@ -61,7 +108,7 @@
  }
  
  CARD8
-@@ -456,7 +450,6 @@
+@@ -459,7 +461,6 @@
      (*Int10Current->mem->wl)(Int10Current, addr, val);
  }
  
@@ -69,7 +116,87 @@
  static CARD32 PciCfg1Addr = 0;
  
  #define TAG(Cfg1Addr) (Cfg1Addr & 0xffff00)
-@@ -489,7 +482,6 @@
+@@ -487,12 +488,85 @@
+ 	return 1;
+     }
+     if (addr == 0xCFC) {
+-	pciWriteLong(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr),val);
++	pciWriteLong(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr), val);
++	return 1;
++    }
++    return 0;
++}
++
++static int
++pciCfg1inw(CARD16 addr, CARD16 *val)
++{
++    int offset, shift;
++
++    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
++	shift = (addr - 0xCF8) * 8;
++	*val = (PciCfg1Addr >> shift) & 0xffff;
++	return 1;
++    }
++    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
++	offset = addr - 0xCFC;
++	*val = pciReadWord(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr) + offset);
++	return 1;
++    }
++    return 0;
++}
++
++static int
++pciCfg1outw(CARD16 addr, CARD16 val)
++{
++    int offset, shift;
++
++    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
++	shift = (addr - 0xCF8) * 8;
++	PciCfg1Addr &= ~(0xffff << shift);
++	PciCfg1Addr |= ((CARD32) val) << shift;
++	return 1;
++    }
++    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
++	offset = addr - 0xCFC;
++	pciWriteWord(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr) + offset, val);
++	return 1;
++    }
++    return 0;
++}
++
++static int
++pciCfg1inb(CARD16 addr, CARD8 *val)
++{
++    int offset, shift;
++
++    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
++	shift = (addr - 0xCF8) * 8;
++	*val = (PciCfg1Addr >> shift) & 0xff;
++	return 1;
++    }
++    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
++	offset = addr - 0xCFC;
++	*val = pciReadByte(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr) + offset);
++	return 1;
++    }
++    return 0;
++}
++
++static int
++pciCfg1outb(CARD16 addr, CARD8 val)
++{
++    int offset, shift;
++
++    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
++	shift = (addr - 0xCF8) * 8;
++	PciCfg1Addr &= ~(0xff << shift);
++	PciCfg1Addr |= ((CARD32) val) << shift;
++	return 1;
++    }
++    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
++	offset = addr - 0xCFC;
++	pciWriteByte(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr) + offset, val);
+ 	return 1;
      }
      return 0;
  }


Index: xorg-x11.spec
===================================================================
RCS file: /cvs/dist/rpms/xorg-x11/devel/xorg-x11.spec,v
retrieving revision 1.218
retrieving revision 1.219
diff -u -r1.218 -r1.219
--- xorg-x11.spec	13 Jul 2005 10:23:24 -0000	1.218
+++ xorg-x11.spec	27 Jul 2005 21:02:38 -0000	1.219
@@ -18,7 +18,7 @@
 
 Name: xorg-x11
 Version: 6.8.2
-Release: 43
+Release: 44
 #Release: 1.FC3.41
 #Release: ?.FC4.41
 
@@ -3599,6 +3599,10 @@
 [ "$RPM_BUILD_ROOT" != "/" ] && rm -rf $RPM_BUILD_ROOT 
 
 %changelog
+* Wed Jul 27 2005 Kristian Høgsberg <krh at redhat.com> 6.8.2-44
+- Update xorg-x11-6.8.2-use-linux-native-pciscan-by-default.patch to
+  fix all occurrences of direct PCI config space access.
+
 * Wed Jul 14 2005 Mike A. Harris <mharris at redhat.com>
 - Fix FC5 spec file typo for virtual libGL Requires in -devel subpackage
 




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