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Re: Feature: Fedora Electronic Lab



I tried to download your NOR.sim and NOR2.sim examples, then run these:
> ## LVS check with netgen
> netgen &
> type: lvs NOR2 NOR

I get this in netgen's tkcon:
Reading netlist file NOR2
Reading netlist file NOR
Ignoring lumped resistances ("R" records) in .sim.
Comparison output logged to file comp.out
Logging to file "comp.out" enabled
Contents of circuit 1:  No cell 'NOR2' found.
Contents of circuit 2:  No cell 'NOR' found.

No cell 'NOR2' found.
Cell NOR2 contains no elements.
n-channel: source == drain.
p-channel: source == drain.
poly cap: permuting poly1 regions.
resistor: permuting endpoints.
capacitor: permuting sides.
Echoing log file "comp.out" output to console disabled
Need to initialize data structures first!
Must initialize data structures first.

(The resulting comp.out is empty.) No segfault though.

        Kevin Kofler


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