3.4. TSC timer synchronization on Opteron CPUs

The current generation of AMD64 Opteron processors are susceptible to a large gettimeofday skew when cpufreq is enabled while using the Time Stamp Counter (TSC). MRG Realtime provides a method to prevent this on Opteron systems by forcing all processors to simultaneously change to the same frequency. As a result, the TSC on a single processor never increments at a different rate than the TSC on another processor.

Enabling TSC timer synchronization

Open the /etc/grub.conf file in your preferred text editor and add the line nohpet nopmtimer powernow-k8.tscsync=1 to the MRG Realtime kernel. This forces the use of TSC and enables simultaneous core processor frequency transitions.

...[output truncated]...
title Red Hat Enterprise Linux (realtime) (2.6.21-57.el5rt)
  root (hd0,0)
  kernel /vmlinuz-2.6.21-57.el5rt ro root=/dev/HelpdeskRHEL5/Root rhgb quiet nohpet nopmtimer powernow-k8.tscsync=1
  initrd /initrd-2.6.21-57.el5rt.img

You will need to restart your system for the changes to take effect.

Related Manual Pages

For more information, or for further reading, the following man pages are related to the information given in this section.

gettimeofday(2)