rpms/xorg-x11-drv-ati/F-10 radeon-modeset.patch, 1.47, 1.48 xorg-x11-drv-ati.spec, 1.161, 1.162
Dave Airlie
airlied at fedoraproject.org
Tue Dec 2 09:14:04 UTC 2008
Author: airlied
Update of /cvs/pkgs/rpms/xorg-x11-drv-ati/F-10
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv20603
Modified Files:
radeon-modeset.patch xorg-x11-drv-ati.spec
Log Message:
- radeon-modeset.patch: fix some DFS issues on r5xx - better fix for rs4xx
radeon-modeset.patch:
Index: radeon-modeset.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/F-10/radeon-modeset.patch,v
retrieving revision 1.47
retrieving revision 1.48
diff -u -r1.47 -r1.48
--- radeon-modeset.patch 26 Nov 2008 02:04:18 -0000 1.47
+++ radeon-modeset.patch 2 Dec 2008 09:13:33 -0000 1.48
@@ -1,3 +1,23 @@
+commit c14f510c877c5ccfb38ebc11b910891a4bcf40ba
+Author: Dave Airlie <airlied at redhat.com>
+Date: Mon Dec 1 15:31:08 2008 +1100
+
+ radeon: don't have 2D and 3D in one CS buffer
+
+commit 73b6e729a09421f759a8c0e55ef830ab6bb2be84
+Author: Dave Airlie <airlied at redhat.com>
+Date: Wed Nov 26 16:09:29 2008 +1100
+
+ radeon: set touched flag on pinned buffers
+
+commit 5f3d3de0fbe755177109d1ab308266b423db1ae6
+Author: Dave Airlie <airlied at redhat.com>
+Date: Wed Nov 26 16:04:35 2008 +1100
+
+ radeon: fix up some of the touched by gpu handling and force gtt handling
+
+ this fixes DFS on the rs690
+
commit 969fb5d72094a2a7b6a2ad40a80a8ed93d6c8193
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Nov 26 12:52:24 2008 +1100
@@ -2454,10 +2474,10 @@
+#endif
diff --git a/src/radeon_bufmgr_gem.c b/src/radeon_bufmgr_gem.c
new file mode 100644
-index 0000000..30f439f
+index 0000000..7508dd7
--- /dev/null
+++ b/src/radeon_bufmgr_gem.c
-@@ -0,0 +1,649 @@
+@@ -0,0 +1,656 @@
+/**************************************************************************
+ *
+ * Copyright © 2007-2008 Red Hat Inc.
@@ -2702,6 +2722,9 @@
+ dri_bo_gem *gem_bo = (dri_bo_gem *)buf;
+ int ret;
+
++ if (!gem_bo->touched)
++ return;
++
+ /* do a set domain */
+ if (gem_bo->force_gtt) {
+ sd_args.handle = gem_bo->gem_handle;
@@ -2744,6 +2767,8 @@
+ bo_gem->pinned = 1;
+ bo_gem->gem_handle = handle;
+ bo_gem->in_vram = 1;
++ /* if we get from kernel assume touched */
++ bo_gem->touched = 1;
+
+ bo_gem->next = bufmgr_gem->bo_list;
+ bufmgr_gem->bo_list = bo_gem;
@@ -2869,7 +2894,7 @@
+ int ret;
+
+ if (domain == RADEON_GEM_DOMAIN_VRAM)
-+ gem_bo->in_vram = 1;
++ gem_bo->in_vram = 1;
+
+ pin.pin_domain = domain;
+ pin.handle = gem_bo->gem_handle;
@@ -2879,6 +2904,8 @@
+ if (ret != 0)
+ return -1;
+
++ /* pinned buffers are considered touched */
++ gem_bo->touched = 1;
+ gem_bo->pinned = 1;
+ return 0;
+}
@@ -3098,7 +3125,7 @@
+{
+ dri_bo_gem *gem_bo = (dri_bo_gem *)buf;
+
-+ if (!gem_bo->pinned)
++ if (!gem_bo->pinned && !gem_bo->force_gtt)
+ gem_bo->force_gtt = 1;
+}
+
@@ -6022,7 +6049,7 @@
+
#endif
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
-index 0f86fdd..f0d1f48 100644
+index 0f86fdd..9fb0f75 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -43,7 +43,11 @@
@@ -6130,7 +6157,7 @@
/* Front buffer is always set with proper swappers */
if (offset == 0)
return;
-@@ -291,14 +341,97 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index)
+@@ -291,42 +341,124 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index)
OUTREG(RADEON_SURFACE0_LOWER_BOUND + soff, 0);
OUTREG(RADEON_SURFACE0_UPPER_BOUND + soff, 0);
swapper_surfaces[index] = 0;
@@ -6227,47 +6254,50 @@
do { \
- uint32_t wait_until = 0; \
- BEGIN_ACCEL(1); \
-+ uint32_t wait_until = 0; \
++ uint32_t flush = 0; \
switch (info->accel_state->engineMode) { \
case EXA_ENGINEMODE_UNKNOWN: \
- wait_until |= RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_2D_IDLECLEAN; \
-@@ -307,15 +440,17 @@ do { \
+- wait_until |= RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_2D_IDLECLEAN; \
+ case EXA_ENGINEMODE_3D: \
+- wait_until |= RADEON_WAIT_3D_IDLECLEAN; \
++ flush = 1; \
case EXA_ENGINEMODE_2D: \
break; \
} \
- OUT_ACCEL_REG(RADEON_WAIT_UNTIL, wait_until); \
- FINISH_ACCEL(); \
-+ if (wait_until) { \
-+ BEGIN_ACCEL(1); \
-+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL, wait_until); \
-+ FINISH_ACCEL(); \
+- info->accel_state->engineMode = EXA_ENGINEMODE_2D; \
++ if (flush) { \
++ RADEONCPFlushIndirect(pScrn, 1); \
+ } \
- info->accel_state->engineMode = EXA_ENGINEMODE_2D; \
++ info->accel_state->engineMode = EXA_ENGINEMODE_2D; \
} while (0);
#define RADEON_SWITCH_TO_3D() \
do { \
- uint32_t wait_until = 0; \
- BEGIN_ACCEL(1); \
-+ uint32_t wait_until = 0; \
++ uint32_t flush = 0; \
switch (info->accel_state->engineMode) { \
case EXA_ENGINEMODE_UNKNOWN: \
- wait_until |= RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN; \
-@@ -324,8 +459,11 @@ do { \
+- wait_until |= RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN; \
+ case EXA_ENGINEMODE_2D: \
+- wait_until |= RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE; \
++ flush = 1; \
case EXA_ENGINEMODE_3D: \
break; \
} \
- OUT_ACCEL_REG(RADEON_WAIT_UNTIL, wait_until); \
- FINISH_ACCEL(); \
-+ if (wait_until) { \
-+ BEGIN_ACCEL(1); \
-+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL, wait_until); \
-+ FINISH_ACCEL(); \
+- info->accel_state->engineMode = EXA_ENGINEMODE_3D; \
++ if (flush) { \
++ RADEONCPFlushIndirect(pScrn, 1); \
+ } \
- info->accel_state->engineMode = EXA_ENGINEMODE_3D; \
++ info->accel_state->engineMode = EXA_ENGINEMODE_3D; \
} while (0);
-@@ -338,6 +476,7 @@ do { \
+ #define ENTER_DRAW(x) TRACE
+@@ -338,6 +470,7 @@ do { \
#define BEGIN_ACCEL(n) RADEONWaitForFifo(pScrn, (n))
#define OUT_ACCEL_REG(reg, val) OUTREG(reg, val)
#define OUT_ACCEL_REG_F(reg, val) OUTREG(reg, F_TO_DW(val))
@@ -6275,7 +6305,7 @@
#define FINISH_ACCEL()
#ifdef RENDER
-@@ -351,6 +490,7 @@ do { \
+@@ -351,6 +484,7 @@ do { \
#undef OUT_ACCEL_REG
#undef OUT_ACCEL_REG_F
#undef FINISH_ACCEL
@@ -6283,7 +6313,7 @@
#ifdef XF86DRI
-@@ -361,6 +501,7 @@ do { \
+@@ -361,6 +495,7 @@ do { \
#define BEGIN_ACCEL(n) BEGIN_RING(2*(n))
#define OUT_ACCEL_REG(reg, val) OUT_RING_REG(reg, val)
#define FINISH_ACCEL() ADVANCE_RING()
@@ -6291,7 +6321,7 @@
#define OUT_RING_F(x) OUT_RING(F_TO_DW(x))
-@@ -378,6 +519,8 @@ do { \
+@@ -378,6 +513,8 @@ do { \
#endif /* XF86DRI */
@@ -6300,7 +6330,7 @@
/*
* Once screen->off_screen_base is set, this function
* allocates the remaining memory appropriately
-@@ -399,122 +542,126 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
+@@ -399,122 +536,126 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
if (info->accel_state->exa == NULL)
return FALSE;
@@ -6530,7 +6560,7 @@
return TRUE;
}
-@@ -527,10 +674,21 @@ extern void ExaOffscreenMarkUsed(PixmapPtr);
+@@ -527,10 +668,21 @@ extern void ExaOffscreenMarkUsed(PixmapPtr);
unsigned long long
RADEONTexOffsetStart(PixmapPtr pPix)
{
@@ -7217,7 +7247,7 @@
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting EXA maxPitchBytes\n");
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
-index 97199ae..0bc0c41 100644
+index 97199ae..5399906 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -54,6 +54,10 @@
@@ -7803,7 +7833,7 @@
#ifdef ACCEL_CP
ADVANCE_RING();
-@@ -2121,14 +2363,22 @@ static void FUNC_NAME(RadeonDoneComposite)(PixmapPtr pDst)
+@@ -2121,14 +2363,24 @@ static void FUNC_NAME(RadeonDoneComposite)(PixmapPtr pDst)
ENTER_DRAW(0);
if (IS_R300_3D || IS_R500_3D) {
@@ -7818,12 +7848,14 @@
LEAVE_DRAW(0);
+
++#if 0
+ /* workaround hang on RS4xx and RS6xx chips */
+ if(info->ChipFamily == CHIP_FAMILY_RS400 ||
+ info->ChipFamily == CHIP_FAMILY_RS480 ||
+ info->ChipFamily == CHIP_FAMILY_RS600 ||
+ info->ChipFamily == CHIP_FAMILY_RS690)
+ RADEONCPFlushIndirect(pScrn, 1);
++#endif
}
#undef ONLY_ONCE
Index: xorg-x11-drv-ati.spec
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/F-10/xorg-x11-drv-ati.spec,v
retrieving revision 1.161
retrieving revision 1.162
diff -u -r1.161 -r1.162
--- xorg-x11-drv-ati.spec 29 Nov 2008 22:10:38 -0000 1.161
+++ xorg-x11-drv-ati.spec 2 Dec 2008 09:13:33 -0000 1.162
@@ -5,7 +5,7 @@
Summary: Xorg X11 ati video driver
Name: xorg-x11-drv-ati
Version: 6.9.0
-Release: 60%{?dist}
+Release: 61%{?dist}
URL: http://www.x.org
License: MIT
Group: User Interface/X Hardware Support
@@ -86,6 +86,9 @@
%{_mandir}/man4/radeon.4*
%changelog
+* Tue Dec 02 2008 Dave Airlie <airlied at redhat.com> 6.9.0-61
+- radeon-modeset.patch: fix some DFS issues on r5xx - better fix for rs4xx
+
* Sun Nov 30 2008 Dave Airlie <airlied at redhat.com> 6.9.0-60
- radeon-6.9.0-posting-fix.patch - add fix to post the second GPU properly
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