rpms/xorg-x11-drv-ati/F-10 radeon-modeset.patch,1.49,1.50
Dave Airlie
airlied at fedoraproject.org
Tue Dec 9 04:39:13 UTC 2008
Author: airlied
Update of /cvs/pkgs/rpms/xorg-x11-drv-ati/F-10
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv14968
Modified Files:
radeon-modeset.patch
Log Message:
* Tue Dec 09 2008 Dave Airlie <airlied at redhat.com> 6.9.0-62
- radeon-modeset.patch: fix resume with no DRI + another 2D/3D issue
radeon-modeset.patch:
Index: radeon-modeset.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/F-10/radeon-modeset.patch,v
retrieving revision 1.49
retrieving revision 1.50
diff -u -r1.49 -r1.50
--- radeon-modeset.patch 9 Dec 2008 03:34:45 -0000 1.49
+++ radeon-modeset.patch 9 Dec 2008 04:38:42 -0000 1.50
@@ -817,6 +817,12 @@
instead of trying to do them all in userspace.
useful steps towards getting kernel modesetting
+
+commit 12e71eaf7999520d23d50cfbcfc0299b2bdf7a9d
+Author: Dave Airlie <airlied at redhat.com>
+Date: Fri Jul 4 10:39:34 2008 +1000
+
+ port to using drm header files
diff --git a/configure.ac b/configure.ac
index b8c18a6..8b126b5 100644
--- a/configure.ac
@@ -1818,7 +1824,7 @@
+#endif
+#endif
diff --git a/src/radeon.h b/src/radeon.h
-index 5455d57..a364e4a 100644
+index f7ae1a8..a364e4a 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -46,6 +46,8 @@
@@ -1838,33 +1844,22 @@
/* Render support */
#ifdef RENDER
#include "picturestr.h"
-@@ -407,22 +410,9 @@ typedef struct _atomBiosHandle *atomBiosHandlePtr;
- #define RADEON_POOL_GART 0
- #define RADEON_POOL_VRAM 1
-
--struct radeon_memory {
-- int pool; // memory is VRAM vs GART
-- unsigned long offset;
-- unsigned long end;
--
-- unsigned long size;
-- unsigned long allocated_size;
-- uint64_t bus_addr;
-- int key;
--
-- Bool bound;
-- unsigned long agp_offset;
-- unsigned int pitch;
-- char *name;
-- struct radeon_memory *next, *prev;
-- uint32_t kernel_bo_handle;
+@@ -404,6 +407,14 @@ typedef enum {
+
+ typedef struct _atomBiosHandle *atomBiosHandlePtr;
+
++#define RADEON_POOL_GART 0
++#define RADEON_POOL_VRAM 1
++
+struct radeon_exa_pixmap_priv {
+ dri_bo *bo;
+ int flags;
- };
-
++};
++
typedef struct {
-@@ -435,7 +425,27 @@ typedef struct {
+ uint32_t pci_device_id;
+ RADEONChipFamily chip_family;
+@@ -414,7 +425,27 @@ typedef struct {
int singledac;
} RADEONCardInfo;
@@ -1892,7 +1887,7 @@
struct radeon_cp {
Bool CPRuns; /* CP is running */
Bool CPInUse; /* CP has been used by X server */
-@@ -449,6 +459,10 @@ struct radeon_cp {
+@@ -428,6 +459,10 @@ struct radeon_cp {
drmBufPtr indirectBuffer;
int indirectStart;
@@ -1903,7 +1898,7 @@
/* Debugging info for BEGIN_RING/ADVANCE_RING pairs. */
int dma_begin_count;
char *dma_debug_func;
-@@ -515,13 +529,13 @@ struct radeon_dri {
+@@ -494,13 +529,13 @@ struct radeon_dri {
drm_handle_t ringHandle; /* Handle from drmAddMap */
drmSize ringMapSize; /* Size of map */
int ringSize; /* Size of ring (in MB) */
@@ -1919,7 +1914,7 @@
/* CP vertex/indirect buffer data */
unsigned long bufStart; /* Offset into GART space */
-@@ -540,7 +554,6 @@ struct radeon_dri {
+@@ -519,7 +554,6 @@ struct radeon_dri {
drmAddress gartTex; /* Map */
int log2GARTTexGran;
@@ -1927,7 +1922,7 @@
int fbX;
int fbY;
int backX;
-@@ -857,6 +870,44 @@ typedef struct {
+@@ -836,6 +870,44 @@ typedef struct {
Bool r600_shadow_fb;
void *fb_shadow;
@@ -1972,7 +1967,7 @@
} RADEONInfoRec, *RADEONInfoPtr;
#define RADEONWaitForFifo(pScrn, entries) \
-@@ -1099,6 +1150,23 @@ extern void
+@@ -1078,6 +1150,23 @@ extern void
radeon_legacy_free_memory(ScrnInfoPtr pScrn,
void *mem_struct);
@@ -1996,7 +1991,7 @@
#ifdef XF86DRI
# ifdef USE_XAA
/* radeon_accelfuncs.c */
-@@ -1117,7 +1185,9 @@ do { \
+@@ -1096,7 +1185,9 @@ do { \
#define RADEONCP_RELEASE(pScrn, info) \
do { \
@@ -2007,7 +2002,7 @@
RADEON_PURGE_CACHE(); \
RADEON_WAIT_UNTIL_IDLE(); \
RADEONCPReleaseIndirect(pScrn); \
-@@ -1151,7 +1221,7 @@ do { \
+@@ -1130,7 +1221,7 @@ do { \
#define RADEONCP_REFRESH(pScrn, info) \
do { \
@@ -2016,7 +2011,7 @@
if (info->cp->needCacheFlush) { \
RADEON_PURGE_CACHE(); \
RADEON_PURGE_ZCACHE(); \
-@@ -1178,6 +1248,13 @@ do { \
+@@ -1157,6 +1248,13 @@ do { \
#define RING_LOCALS uint32_t *__head = NULL; int __expected; int __count = 0
#define BEGIN_RING(n) do { \
@@ -2030,7 +2025,7 @@
if (RADEON_VERBOSE) { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"BEGIN_RING(%d) in %s\n", (unsigned int)n, __FUNCTION__);\
-@@ -1190,13 +1267,6 @@ do { \
+@@ -1169,13 +1267,6 @@ do { \
} \
info->cp->dma_debug_func = __FILE__; \
info->cp->dma_debug_lineno = __LINE__; \
@@ -2044,7 +2039,7 @@
__expected = n; \
__head = (pointer)((char *)info->cp->indirectBuffer->address + \
info->cp->indirectBuffer->used); \
-@@ -1239,6 +1309,14 @@ do { \
+@@ -1218,6 +1309,14 @@ do { \
OUT_RING(val); \
} while (0)
@@ -2059,7 +2054,7 @@
#define FLUSH_RING() \
do { \
if (RADEON_VERBOSE) \
-@@ -1310,6 +1388,43 @@ do { \
+@@ -1289,6 +1388,43 @@ do { \
#endif /* XF86DRI */
@@ -3358,7 +3353,7 @@
xf86CrtcPtr crtc = xf86_config->crtc[c];
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
-index 7892ae3..a4e8dea 100644
+index 5542d2b..a4e8dea 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -40,6 +40,8 @@
@@ -3370,7 +3365,16 @@
/* Driver data structures */
#include "radeon.h"
-@@ -69,16 +71,31 @@ static size_t radeon_drm_page_size;
+@@ -50,6 +52,8 @@
+ #include "radeon_dri.h"
+ #include "radeon_version.h"
+
++#include "radeon_drm.h"
++
+ /* X and server generic header files */
+ #include "xf86.h"
+ #include "xf86PciInfo.h"
+@@ -67,16 +71,31 @@ static size_t radeon_drm_page_size;
extern void GlxSetVisualConfigs(int nconfigs, __GLXvisualConfig *configs,
void **configprivs);
@@ -3404,7 +3408,7 @@
static void RADEONDRIClipNotify(ScreenPtr pScreen, WindowPtr *ppWin, int num);
#endif
#endif
-@@ -351,6 +368,126 @@ static void RADEONDestroyContext(ScreenPtr pScreen, drm_context_t hwContext,
+@@ -349,6 +368,126 @@ static void RADEONDestroyContext(ScreenPtr pScreen, drm_context_t hwContext,
#endif
}
@@ -3531,7 +3535,7 @@
/* Called when the X server is woken up to allow the last client's
* context to be saved and the X server's context to be loaded. This is
* not necessary for the Radeon since the client detects when it's
-@@ -700,25 +837,35 @@ static void RADEONDRIInitGARTValues(RADEONInfoPtr info)
+@@ -698,25 +837,35 @@ static void RADEONDRIInitGARTValues(RADEONInfoPtr info)
info->dri->gartOffset = 0;
@@ -3586,7 +3590,7 @@
}
/* Set AGP transfer mode according to requests and constraints */
-@@ -890,6 +1037,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -888,6 +1037,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[agp] ring handle = 0x%08x\n", info->dri->ringHandle);
@@ -3595,7 +3599,7 @@
if (drmMap(info->dri->drmFD, info->dri->ringHandle, info->dri->ringMapSize,
&info->dri->ring) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map ring\n");
-@@ -898,9 +1047,10 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -896,9 +1047,10 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[agp] Ring mapped at 0x%08lx\n",
(unsigned long)info->dri->ring);
@@ -3607,7 +3611,7 @@
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[agp] Could not add ring read ptr mapping\n");
return FALSE;
-@@ -909,6 +1059,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -907,6 +1059,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
"[agp] ring read ptr handle = 0x%08x\n",
info->dri->ringReadPtrHandle);
@@ -3616,7 +3620,7 @@
if (drmMap(info->dri->drmFD, info->dri->ringReadPtrHandle, info->dri->ringReadMapSize,
&info->dri->ringReadPtr) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR,
-@@ -918,6 +1070,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -916,6 +1070,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[agp] Ring read ptr mapped at 0x%08lx\n",
(unsigned long)info->dri->ringReadPtr);
@@ -3624,7 +3628,7 @@
if (drmAddMap(info->dri->drmFD, info->dri->bufStart, info->dri->bufMapSize,
DRM_AGP, 0, &info->dri->bufHandle) < 0) {
-@@ -993,6 +1146,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -991,6 +1146,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[pci] ring handle = 0x%08x\n", info->dri->ringHandle);
@@ -3632,7 +3636,7 @@
if (drmMap(info->dri->drmFD, info->dri->ringHandle, info->dri->ringMapSize,
&info->dri->ring) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not map ring\n");
-@@ -1004,6 +1158,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1002,6 +1158,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[pci] Ring contents 0x%08lx\n",
*(unsigned long *)(pointer)info->dri->ring);
@@ -3640,7 +3644,7 @@
if (drmAddMap(info->dri->drmFD, info->dri->ringReadOffset, info->dri->ringReadMapSize,
DRM_SCATTER_GATHER, flags, &info->dri->ringReadPtrHandle) < 0) {
-@@ -1015,8 +1170,10 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1013,8 +1170,10 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
"[pci] ring read ptr handle = 0x%08x\n",
info->dri->ringReadPtrHandle);
@@ -3651,7 +3655,7 @@
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[pci] Could not map ring read ptr\n");
return FALSE;
-@@ -1027,6 +1184,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1025,6 +1184,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[pci] Ring read ptr contents 0x%08lx\n",
*(unsigned long *)(pointer)info->dri->ringReadPtr);
@@ -3659,7 +3663,7 @@
if (drmAddMap(info->dri->drmFD, info->dri->bufStart, info->dri->bufMapSize,
DRM_SCATTER_GATHER, 0, &info->dri->bufHandle) < 0) {
-@@ -1079,6 +1237,9 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1077,6 +1237,9 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
*/
static Bool RADEONDRIMapInit(RADEONInfoPtr info, ScreenPtr pScreen)
{
@@ -3669,7 +3673,7 @@
/* Map registers */
info->dri->registerSize = info->MMIOSize;
if (drmAddMap(info->dri->drmFD, info->MMIOAddr, info->dri->registerSize,
-@@ -1117,20 +1278,23 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1115,20 +1278,23 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
drmInfo.fb_bpp = info->CurrentLayout.pixel_code;
drmInfo.depth_bpp = (info->dri->depthBits - 8) * 2;
@@ -3707,7 +3711,7 @@
if (drmCommandWrite(info->dri->drmFD, DRM_RADEON_CP_INIT,
&drmInfo, sizeof(drm_radeon_init_t)) < 0)
return FALSE;
-@@ -1139,7 +1303,8 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1137,7 +1303,8 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
* registers back to their default values, so we need to restore
* those engine register here.
*/
@@ -3717,7 +3721,7 @@
return TRUE;
}
-@@ -1335,12 +1500,11 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
+@@ -1333,12 +1500,11 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
/* Get DRM version & close DRM */
info->dri->pKernelDRMVersion = drmGetVersion(fd);
@@ -3731,7 +3735,7 @@
}
/* Now check if we qualify */
-@@ -1374,10 +1538,29 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
+@@ -1372,10 +1538,29 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
req_patch);
drmFreeVersion(info->dri->pKernelDRMVersion);
info->dri->pKernelDRMVersion = NULL;
@@ -3762,7 +3766,7 @@
}
Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
-@@ -1386,6 +1569,9 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
+@@ -1384,6 +1569,9 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
int value = 0;
@@ -3772,7 +3776,7 @@
if (!info->want_vblank_interrupts)
on = FALSE;
-@@ -1405,6 +1591,48 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
+@@ -1403,6 +1591,48 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
return TRUE;
}
@@ -3821,7 +3825,7 @@
/* Initialize the screen-specific data structures for the DRI and the
* Radeon. This is the main entry point to the device-specific
-@@ -1468,10 +1696,22 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
+@@ -1466,10 +1696,22 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo->ddxDriverMajorVersion = info->allowColorTiling ? 5 : 4;
pDRIInfo->ddxDriverMinorVersion = 3;
pDRIInfo->ddxDriverPatchVersion = 0;
@@ -3848,7 +3852,7 @@
pDRIInfo->ddxDrawableTableEntry = RADEON_MAX_DRAWABLES;
pDRIInfo->maxDrawableTableEntry = (SAREA_MAX_DRAWABLES
< RADEON_MAX_DRAWABLES
-@@ -1524,9 +1764,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
+@@ -1522,9 +1764,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo->TransitionTo3d = RADEONDRITransitionTo3d;
pDRIInfo->TransitionSingleToMulti3D = RADEONDRITransitionSingleToMulti3d;
pDRIInfo->TransitionMultiToSingle3D = RADEONDRITransitionMultiToSingle3d;
@@ -3859,7 +3863,7 @@
pDRIInfo->ClipNotify = RADEONDRIClipNotify;
#endif
-@@ -1558,78 +1796,60 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
+@@ -1556,57 +1796,60 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo = NULL;
return FALSE;
}
@@ -3896,57 +3900,38 @@
- {
- void *scratch_ptr;
- int scratch_int;
--
-- DRIGetDeviceInfo(pScreen, &info->dri->fbHandle,
-- &scratch_int, &scratch_int,
-- &scratch_int, &scratch_int,
-- &scratch_ptr);
-- }
+ /* Now, nuke dri.c's dummy frontbuffer map setup if we did that. */
+ if (pDRIInfo->frameBufferSize != 0 && info->drm_mm) {
+ int tmp;
+ drm_handle_t fb_handle;
+ void *ptmp;
+- DRIGetDeviceInfo(pScreen, &info->dri->fbHandle,
+- &scratch_int, &scratch_int,
+- &scratch_int, &scratch_int,
+- &scratch_ptr);
+- }
+-
- /* FIXME: When are these mappings unmapped? */
+-
+- if (!RADEONInitVisualConfigs(pScreen)) {
+- RADEONDRICloseScreen(pScreen);
+- return FALSE;
+ /* With the compat method, it will continue to report
+ * the wrong map out of GetDeviceInfo, which will break AIGLX.
+ */
+ DRIGetDeviceInfo(pScreen, &fb_handle, &tmp, &tmp, &tmp, &tmp, &ptmp);
+ drmRmMap(info->dri->drmFD, fb_handle);
-
-- if (!RADEONInitVisualConfigs(pScreen)) {
-- RADEONDRICloseScreen(pScreen);
-- return FALSE;
++
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "Removed DRI frontbuffer mapping in compatibility mode.\n");
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "DRIGetDeviceInfo will report incorrect frontbuffer "
+ "handle.\n");
- }
-- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] Visual configs initialized\n");
--
-- {
-- int page_size = getpagesize();
-- struct drm_radeon_gem_init init_args;
--
++ }
+
+ if (info->drm_mm) {
- int ret;
--
-- unsigned long aperStart = ((info->pciAperSize * 1024 * 1024) - (16384 * 1024)) / page_size;
-- unsigned long aperEnd = ((info->pciAperSize * 1024 * 1024)) / page_size;
--
-- init_args.gtt_start = aperStart;
-- init_args.gtt_end = aperEnd;
-- init_args.vram_start = info->FbMapSize / page_size;
-- init_args.vram_end = (pScrn->videoRam * 1024) / page_size;
--
-- ErrorF("initing %llx %llx %llx %llx\n", init_args.gtt_start,
-- init_args.gtt_end, init_args.vram_start, init_args.vram_end);
-- ret = drmCommandWriteRead(info->drmFD, DRM_RADEON_GEM_INIT, &init_args, sizeof(init_args));
-- if (ret)
-- ErrorF("ioctl failed %d\n", ret);
++ int ret;
+ ret = radeon_dri_gart_init(pScreen);
+ if (!ret) {
+ xf86DrvMsg(pScreen->myNum, X_ERROR,
@@ -3974,6 +3959,7 @@
+ return FALSE;
+ }
}
+- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] Visual configs initialized\n");
return TRUE;
}
@@ -3982,7 +3968,7 @@
static Bool RADEONDRIDoCloseScreen(int scrnIndex, ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-@@ -1671,14 +1891,18 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
+@@ -1648,14 +1891,18 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
return FALSE;
}
@@ -4007,7 +3993,7 @@
/* Initialize kernel GART memory manager */
RADEONDRIGartHeapInit(info, pScreen);
-@@ -1690,6 +1914,10 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
+@@ -1667,6 +1914,10 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
pSAREAPriv = (drm_radeon_sarea_t*)DRIGetSAREAPrivate(pScreen);
memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
@@ -4018,7 +4004,7 @@
pRADEONDRI = (RADEONDRIPtr)info->dri->pDRIInfo->devPrivate;
pRADEONDRI->deviceID = info->Chipset;
-@@ -1846,6 +2074,8 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
+@@ -1823,6 +2074,8 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
drmUnmap(info->dri->buf, info->dri->bufMapSize);
info->dri->buf = NULL;
}
@@ -4027,7 +4013,7 @@
if (info->dri->ringReadPtr) {
drmUnmap(info->dri->ringReadPtr, info->dri->ringReadMapSize);
info->dri->ringReadPtr = NULL;
-@@ -1854,6 +2084,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
+@@ -1831,6 +2084,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
drmUnmap(info->dri->ring, info->dri->ringMapSize);
info->dri->ring = NULL;
}
@@ -4035,32 +4021,23 @@
if (info->dri->agpMemHandle != DRM_AGP_NO_HANDLE) {
drmAgpUnbind(info->dri->drmFD, info->dri->agpMemHandle);
drmAgpFree(info->dri->drmFD, info->dri->agpMemHandle);
-@@ -2261,18 +2492,15 @@ int RADEONDRISetParam(ScrnInfoPtr pScrn, unsigned int param, int64_t value)
+@@ -2237,3 +2491,16 @@ int RADEONDRISetParam(ScrnInfoPtr pScrn, unsigned int param, int64_t value)
+ &radeonsetparam, sizeof(drm_radeon_setparam_t));
return ret;
}
-
--int RADEONAllocateKernelVRAM(ScrnInfoPtr pScrn, int size, int alignment, Boolean no_backing_store, uint32_t *handle)
++
+static Bool radeon_dri_gart_init(ScreenPtr pScreen)
- {
-- struct drm_radeon_gem_create args;
--
-- args.size = size;
-- args.alignment = alignment;
-- args.initial_domain = RADEON_GEM_DOMAIN_GPU;
-- args.no_backing_store = no_backing_store;
++{
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
-
++
+ RADEONDRIInitGARTValues(info);
-
-- ret = drmCommandWriteRead(info->drmFD, DRM_RADEON_GEM_CREATE, &args, sizeof(args));
++
+ /* so we want to allocate the buffers/gart texmap */
+ /* ignore ring stuff */
+ return radeon_setup_gart_mem(pScreen);
-
-- *handle = args.handle;
-- return ret;
- }
++
++}
diff --git a/src/radeon_dri_bufmgr.c b/src/radeon_dri_bufmgr.c
new file mode 100644
index 0000000..f6154dc
@@ -4542,7 +4519,7 @@
+
+#endif
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
-index 33c4090..9ff2988 100644
+index c759bd6..9ff2988 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -67,7 +67,7 @@
@@ -4566,17 +4543,15 @@
}
static Bool
RADEONCreateScreenResources (ScreenPtr pScreen)
-@@ -1621,9 +1624,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn)
+@@ -1620,6 +1623,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn)
+ }
pScrn->videoRam &= ~1023;
-
-- /* half video RAM for TTM */
++
info->FbMapSize = pScrn->videoRam * 1024;
-- info->FbMapSize /= 2;
/* if the card is PCI Express reserve the last 32k for the gart table */
- #ifdef XF86DRI
-@@ -1750,56 +1751,62 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
+@@ -1747,56 +1751,62 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
from = X_PROBED;
info->LinearAddr = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & ~0x1ffffffUL;
pScrn->memPhysBase = info->LinearAddr;
@@ -4681,7 +4656,25 @@
#ifdef XF86DRI
/* AGP/PCI */
-@@ -2109,15 +2116,9 @@ static Bool RADEONPreInitInt10(ScrnInfoPtr pScrn, xf86Int10InfoPtr *ppInt10)
+@@ -1989,6 +1999,9 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn)
+ if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) {
+ int errmaj = 0, errmin = 0;
+
++#if defined(USE_EXA)
++ info->useEXA = TRUE;
++#endif
+ from = X_DEFAULT;
+ #if defined(USE_EXA)
+ #if defined(USE_XAA)
+@@ -1999,6 +2012,7 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn)
+ info->useEXA = TRUE;
+ } else if (xf86NameCmp(optstr, "XAA") == 0) {
+ from = X_CONFIG;
++ info->useEXA = FALSE;
+ }
+ }
+ #else /* USE_XAA */
+@@ -2102,15 +2116,9 @@ static Bool RADEONPreInitInt10(ScrnInfoPtr pScrn, xf86Int10InfoPtr *ppInt10)
return TRUE;
}
@@ -4698,7 +4691,7 @@
if (!(info->dri = xcalloc(1, sizeof(struct radeon_dri)))) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Unable to allocate dri rec!\n");
-@@ -2128,6 +2129,22 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
+@@ -2121,6 +2129,22 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Unable to allocate cp rec!\n");
return FALSE;
}
@@ -4721,7 +4714,7 @@
info->cp->CPInUse = FALSE;
info->cp->CPStarted = FALSE;
info->cp->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT;
-@@ -2692,6 +2709,37 @@ static const xf86CrtcConfigFuncsRec RADEONCRTCResizeFuncs = {
+@@ -2685,6 +2709,37 @@ static const xf86CrtcConfigFuncsRec RADEONCRTCResizeFuncs = {
RADEONCRTCResize
};
@@ -4759,7 +4752,7 @@
Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
{
xf86CrtcConfigPtr xf86_config;
-@@ -2712,6 +2760,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
+@@ -2705,6 +2760,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
info = RADEONPTR(pScrn);
info->MMIO = NULL;
@@ -4768,7 +4761,7 @@
info->IsSecondary = FALSE;
info->IsPrimary = FALSE;
-@@ -2746,59 +2796,63 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
+@@ -2739,59 +2796,63 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
}
info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index);
@@ -4876,7 +4869,7 @@
if (xf86RegisterResources(info->pEnt->index, 0, ResExclusive))
goto fail;
-@@ -2808,10 +2862,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
+@@ -2801,10 +2862,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_VIEWPORT | RAC_CURSOR;
pScrn->monitor = pScrn->confScreen->monitor;
@@ -4893,7 +4886,7 @@
if (!RADEONPreInitVisual(pScrn))
goto fail;
-@@ -2825,136 +2881,197 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
+@@ -2818,136 +2881,197 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
memcpy(info->Options, RADEONOptions, sizeof(RADEONOptions));
xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, info->Options);
@@ -5196,7 +5189,7 @@
/* Get ScreenInit function */
if (!xf86LoadSubModule(pScrn, "fb")) return FALSE;
-@@ -2969,10 +3086,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
+@@ -2962,10 +3086,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
if (!RADEONPreInitXv(pScrn)) goto fail;
}
@@ -5213,7 +5206,7 @@
}
if (pScrn->modes == NULL) {
-@@ -3213,7 +3332,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3206,7 +3332,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
int subPixelOrder = SubPixelUnknown;
char* s;
#endif
@@ -5222,7 +5215,7 @@
info->accelOn = FALSE;
#ifdef USE_XAA
-@@ -3233,52 +3352,55 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3226,52 +3352,55 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
"RADEONScreenInit %lx %ld\n",
pScrn->memPhysBase, pScrn->fbOffset);
#endif
@@ -5312,7 +5305,7 @@
/* Visual setup */
miClearVisualTypes();
if (!miSetVisualTypes(pScrn->depth,
-@@ -3312,19 +3434,21 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3305,19 +3434,21 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
hasDRI = info->directRenderingEnabled;
#endif /* XF86DRI */
@@ -5347,7 +5340,7 @@
}
}
-@@ -3364,11 +3488,16 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3357,11 +3488,16 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
if (hasDRI) {
info->accelDFS = info->cardType != CARD_AGP;
@@ -5364,7 +5357,7 @@
/* Reserve approx. half of offscreen memory for local textures by
* default, can be overridden with Option "FBTexPercent".
* Round down to a whole number of texture regions.
-@@ -3397,7 +3526,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3390,7 +3526,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
#endif
#if defined(XF86DRI) && defined(USE_XAA)
@@ -5373,7 +5366,7 @@
info->dri->textureSize = -1;
if (xf86GetOptValInteger(info->Options, OPTION_FBTEX_PERCENT,
&(info->dri->textureSize))) {
-@@ -3415,7 +3544,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3408,7 +3544,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
#endif
#ifdef USE_XAA
@@ -5382,7 +5375,7 @@
return FALSE;
#endif
-@@ -3436,7 +3565,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3429,7 +3565,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
info->CurrentLayout.pixel_bytes);
int maxy = info->FbMapSize / width_bytes;
@@ -5391,7 +5384,7 @@
xf86DrvMsg(scrnIndex, X_ERROR,
"Static buffer allocation failed. Disabling DRI.\n");
xf86DrvMsg(scrnIndex, X_ERROR,
-@@ -3450,15 +3579,41 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3443,15 +3579,41 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
}
}
@@ -5436,7 +5429,7 @@
#endif
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"Initializing fb layer\n");
-@@ -3482,7 +3637,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3475,7 +3637,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
if (info->r600_shadow_fb == FALSE) {
/* Init fb layer */
@@ -5445,7 +5438,7 @@
pScrn->virtualX, pScrn->virtualY,
pScrn->xDpi, pScrn->yDpi, pScrn->displayWidth,
pScrn->bitsPerPixel))
-@@ -3524,8 +3679,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3517,8 +3679,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
/* restore the memory map here otherwise we may get a hang when
* initializing the drm below
*/
@@ -5458,7 +5451,7 @@
/* Backing store setup */
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
-@@ -3535,7 +3692,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3528,7 +3692,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
/* DRI finalisation */
#ifdef XF86DRI
@@ -5467,7 +5460,7 @@
info->dri->pKernelDRMVersion->version_minor >= 19)
{
if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_PCIGART_LOCATION, info->dri->pciGartOffset) < 0)
-@@ -3554,11 +3711,17 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3547,11 +3711,17 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
info->directRenderingEnabled = RADEONDRIFinishScreenInit(pScreen);
}
if (info->directRenderingEnabled) {
@@ -5486,7 +5479,7 @@
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n");
-@@ -3656,10 +3819,16 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3649,10 +3819,16 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
return FALSE;
}
}
@@ -5496,15 +5489,15 @@
- if (!xf86SetDesiredModes (pScrn))
+ if (info->drm_mode_setting) {
+ if (!drmmode_set_desired_modes(pScrn, &info->drmmode))
- return FALSE;
++ return FALSE;
+ } else {
+ if (!xf86SetDesiredModes (pScrn))
-+ return FALSE;
+ return FALSE;
+ }
/* Provide SaveScreen & wrap BlockHandler and CloseScreen */
/* Wrap CloseScreen */
-@@ -5140,7 +5309,7 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
+@@ -5133,7 +5309,7 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
#ifdef XF86DRI
Bool CPStarted = info->cp->CPStarted;
@@ -5513,7 +5506,7 @@
DRILock(pScrn->pScreen, 0);
RADEONCP_STOP(pScrn, info);
}
-@@ -5163,8 +5332,10 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
+@@ -5156,8 +5332,10 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
#endif
}
@@ -5526,7 +5519,7 @@
ret = xf86SetSingleMode (pScrn, mode, RR_Rotate_0);
-@@ -5176,15 +5347,18 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
+@@ -5169,15 +5347,18 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
/* xf86SetRootClip would do, but can't access that here */
}
@@ -5552,7 +5545,7 @@
}
#endif
-@@ -5382,6 +5556,11 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
+@@ -5375,6 +5556,11 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
xf86OutputPtr output = config->output[config->compat_output];
xf86CrtcPtr crtc = output->crtc;
@@ -5564,7 +5557,7 @@
#ifdef XF86DRI
if (info->cp->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
#endif
-@@ -5417,67 +5596,92 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
+@@ -5410,67 +5596,92 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"RADEONEnterVT\n");
@@ -5702,7 +5695,7 @@
}
#endif
/* this will get XVideo going again, but only if XVideo was initialised
-@@ -5489,7 +5693,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
+@@ -5482,7 +5693,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
RADEONEngineRestore(pScrn);
#ifdef XF86DRI
@@ -5711,7 +5704,7 @@
RADEONCP_START(pScrn, info);
DRIUnlock(pScrn->pScreen);
}
-@@ -5512,17 +5716,18 @@ void RADEONLeaveVT(int scrnIndex, int flags)
+@@ -5505,17 +5716,18 @@ void RADEONLeaveVT(int scrnIndex, int flags)
"RADEONLeaveVT\n");
#ifdef XF86DRI
if (RADEONPTR(pScrn)->directRenderingInited) {
@@ -5741,7 +5734,7 @@
/* Make sure 3D clients will re-upload textures to video RAM */
if (info->dri->textureSize) {
-@@ -5538,6 +5743,11 @@ void RADEONLeaveVT(int scrnIndex, int flags)
+@@ -5531,6 +5743,11 @@ void RADEONLeaveVT(int scrnIndex, int flags)
i = list[i].next;
} while (i != 0);
}
@@ -5753,7 +5746,7 @@
}
#endif
-@@ -5558,10 +5768,18 @@ void RADEONLeaveVT(int scrnIndex, int flags)
+@@ -5551,10 +5768,18 @@ void RADEONLeaveVT(int scrnIndex, int flags)
xf86_hide_cursors (pScrn);
@@ -5775,7 +5768,7 @@
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"Ok, leaving now...\n");
-@@ -5606,7 +5824,8 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
+@@ -5599,7 +5824,8 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
#endif /* USE_XAA */
if (pScrn->vtSema) {
@@ -5785,7 +5778,7 @@
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
-@@ -5641,6 +5860,12 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
+@@ -5634,6 +5860,12 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
info->DGAModes = NULL;
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"Unmapping memory\n");
@@ -6113,7 +6106,7 @@
+
#endif
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
-index 6c3bf92..48a1640 100644
+index 0f86fdd..48a1640 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -43,7 +43,11 @@
@@ -6177,7 +6170,7 @@
+
+ if (radeon_bufmgr_gem_has_references(driver_priv->bo))
+ RADEONCPFlushIndirect(pScrn, 0);
-+
+
+ radeon_bufmgr_gem_wait_rendering(driver_priv->bo);
+
+ /* flush IB */
@@ -6190,7 +6183,7 @@
+ pPix->devPrivate.ptr = driver_priv->bo->virtual;
+ }
+ }
-
++
+#if X_BYTE_ORDER == X_BIG_ENDIAN
/* Front buffer is always set with proper swappers */
if (offset == 0)
@@ -6208,7 +6201,7 @@
uint32_t offset = exaGetPixmapOffset(pPix);
int soff;
+ struct radeon_exa_pixmap_priv *driver_priv;
-
++
+ driver_priv = exaGetPixmapDriverPrivate(pPix);
+
+ if (driver_priv) {
@@ -6216,7 +6209,7 @@
+ pPix->devPrivate.ptr = NULL;
+ }
+
-+
+
+#if X_BYTE_ORDER == X_BIG_ENDIAN
/* Front buffer is always set with proper swappers */
if (offset == 0)
@@ -6278,28 +6271,6 @@
+ if (!driver_priv)
+ return FALSE;
+
-+
-+ if (info->drm_mode_setting && drmmode_is_rotate_pixmap(pScrn, pPixData, &driver_priv->bo)){
-+ dri_bo_unmap(driver_priv->bo);
-+ dri_bo_reference(driver_priv->bo);
-+ miModifyPixmapHeader(pPixmap, width, height, depth,
-+ bitsPerPixel, devKind, NULL);
-+
-+ return TRUE;
-+ }
-+
-+ if (pPixData == info->mm.front_buffer->map) {
-+ driver_priv->flags |= RADEON_PIXMAP_IS_FRONTBUFFER;
-+
-+ driver_priv->bo = radeon_bo_gem_create_from_name(info->bufmgr, "front",
-+ radeon_name_buffer(pScrn, info->mm.front_buffer));
-+
-+ miModifyPixmapHeader(pPixmap, width, height, depth,
-+ bitsPerPixel, devKind, NULL);
-+ return TRUE;
-+ }
-+ return FALSE;
-+}
-#define RADEON_SWITCH_TO_2D() \
-do { \
@@ -6334,6 +6305,28 @@
- FINISH_ACCEL(); \
- info->accel_state->engineMode = EXA_ENGINEMODE_3D; \
-} while (0);
++ if (info->drm_mode_setting && drmmode_is_rotate_pixmap(pScrn, pPixData, &driver_priv->bo)){
++ dri_bo_unmap(driver_priv->bo);
++ dri_bo_reference(driver_priv->bo);
++ miModifyPixmapHeader(pPixmap, width, height, depth,
++ bitsPerPixel, devKind, NULL);
++
++ return TRUE;
++ }
++
++ if (pPixData == info->mm.front_buffer->map) {
++ driver_priv->flags |= RADEON_PIXMAP_IS_FRONTBUFFER;
++
++ driver_priv->bo = radeon_bo_gem_create_from_name(info->bufmgr, "front",
++ radeon_name_buffer(pScrn, info->mm.front_buffer));
++
++ miModifyPixmapHeader(pPixmap, width, height, depth,
++ bitsPerPixel, devKind, NULL);
++ return TRUE;
++ }
++ return FALSE;
++}
++
+static Bool RADEONEXAPixmapIsOffscreen(PixmapPtr pPix)
+{
+ struct radeon_exa_pixmap_priv *driver_priv;
@@ -6612,7 +6605,7 @@
return TRUE;
}
-@@ -527,17 +636,21 @@ extern void ExaOffscreenMarkUsed(PixmapPtr);
+@@ -527,10 +636,21 @@ extern void ExaOffscreenMarkUsed(PixmapPtr);
unsigned long long
RADEONTexOffsetStart(PixmapPtr pPix)
{
@@ -6637,13 +6630,6 @@
+ return offset;
}
#endif
--
--Bool RADEONSetupMemEXAKernel(ScreenPtr pScreen)
--{
--
--
--}
--
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index 62224d0..eba325e 100644
--- a/src/radeon_exa_funcs.c
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