rpms/vhd2vl/F-9 import.log, NONE, 1.1 vhd2vl-typo.patch, NONE, 1.1 vhd2vl-v2.01.patch, NONE, 1.1 vhd2vl.spec, NONE, 1.1 .cvsignore, 1.1, 1.2 sources, 1.1, 1.2
Chitlesh GOORAH
chitlesh at fedoraproject.org
Sat Dec 20 17:58:44 UTC 2008
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Author: chitlesh
Update of /cvs/pkgs/rpms/vhd2vl/F-9
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv28060/F-9
Modified Files:
.cvsignore sources
Added Files:
import.log vhd2vl-typo.patch vhd2vl-v2.01.patch vhd2vl.spec
Log Message:
first time
--- NEW FILE import.log ---
vhd2vl-2_0-3_fc10:F-9:vhd2vl-2.0-3.fc10.src.rpm:1229795838
vhd2vl-typo.patch:
--- NEW FILE vhd2vl-typo.patch ---
--- src/vhd2vl.y 2008-12-15 19:23:02.000000000 +0100
+++ src/vhd2vl.y.fed 2008-12-15 19:23:13.000000000 +0100
@@ -847,8 +847,8 @@
}
;
-updown : DOWNTO {$$=-1}
- | TO {$$=1}
+updown : DOWNTO {$$=-1;}
+ | TO {$$=1;}
;
/* Architecture */
@@ -1386,7 +1386,7 @@
$$=addtxt(sl,";\n");
}
-p_decl : rem {$$=$1}
+p_decl : rem {$$=$1;}
| rem VARIABLE s_list ':' type ';' p_decl {
slist *sl;
sglist *sg, *p;
vhd2vl-v2.01.patch:
--- NEW FILE vhd2vl-v2.01.patch ---
Only in vhd2vl-2.01/examples: foo.v
diff -ur vhd2vl/src/makefile vhd2vl-2.01/src/makefile
--- vhd2vl/src/makefile 2006-06-15 18:30:03.000000000 -0700
+++ vhd2vl-2.01/src/makefile 2008-04-20 16:58:55.000000000 -0700
@@ -1,5 +1,5 @@
vhd2vl : lex.yy.c vhd2vl.tab.c
- gcc -g -o vhd2vl lex.yy.c vhd2vl.tab.c -lfl
+ gcc -Wall -O -g -o vhd2vl lex.yy.c vhd2vl.tab.c -lfl
vhd2vl.tab.c : vhd2vl.y
bison -d -v -t vhd2vl.y
diff -ur vhd2vl/src/vhd2vl.l vhd2vl-2.01/src/vhd2vl.l
--- vhd2vl/src/vhd2vl.l 2006-06-16 11:21:12.000000000 -0700
+++ vhd2vl-2.01/src/vhd2vl.l 2008-04-20 16:50:26.000000000 -0700
@@ -67,6 +67,7 @@
"map" { return MAP; }
"in" { return IN; }
"out" { return OUT; }
+"inout" { return INOUT; }
"time" |
"natural" |
"integer" |
@@ -108,6 +109,7 @@
"and" { return AND; }
"or" { return OR; }
"xor" { return XOR; }
+"xnor" { return XNOR; }
"mod" { return MOD; }
"ns" |
"ps" |
@@ -119,7 +121,7 @@
"to_unsigned" { return CONVFUNC_2;}
\"[ \!#-~]*\" |
-\'[0-1]\' { getstring(1); return STRING;}
+\'[01xz]\' { getstring(1); return STRING;}
#[0-9a-f]*# {
getbasedstring(1); /* skip leading # */
@@ -162,6 +164,6 @@
}
-yyerror(char *s){
+void yyerror(char *s){
fprintf(stderr,"%s at \"%s\" in line %d.\n\n",s,yytext,lineno);
}
diff -ur vhd2vl/src/vhd2vl.y vhd2vl-2.01/src/vhd2vl.y
--- vhd2vl/src/vhd2vl.y 2006-06-16 11:20:44.000000000 -0700
+++ vhd2vl-2.01/src/vhd2vl.y 2008-04-20 16:52:08.000000000 -0700
@@ -23,10 +23,14 @@
%{
#include <stdio.h>
+#include <stdlib.h>
#include <string.h>
#include <assert.h>
#include "def.h"
+int yylex(void);
+void yyerror(char *s);
+
int skipRem = 0;
int lineno=1;
@@ -91,7 +95,7 @@
fprintf(fp,"%d",sl->data.val);
break;
case 3 :
- fprintf(fp,"%s",*(sl->data.txt));
+ fprintf(fp,"%s",*(sl->data.ptxt));
break;
}
}
@@ -120,6 +124,7 @@
}
return newsl;
}
+ return NULL;
}
slist *addtxt(slist *sl, char *s){
@@ -233,6 +238,18 @@
return sl->data.txt;
}
+char *inout_string(int type)
+{
+ char *name=NULL;
+ switch(type) {
+ case 0: name="input" ; break;
+ case 1: name="output" ; break;
+ case 2: name="inout" ; break;
+ default: break;
+ }
+ return name;
+}
+
int prec(char op){
switch(op){
case 'o': /* others */
@@ -403,14 +420,14 @@
slval *ss; /* Signal structure */
}
-%token <txt> REM ENTITY IS PORT GENERIC IN OUT MAP
+%token <txt> REM ENTITY IS PORT GENERIC IN OUT INOUT MAP
%token <txt> BIT BITVECT DOWNTO TO TYPE END
%token <txt> ARCHITECTURE COMPONENT OF
%token <txt> SIGNAL BEGN NOT WHEN WITH EXIT
%token <txt> SELECT OTHERS PROCESS VARIABLE CONSTANT
%token <txt> IF THEN ELSIF ELSE CASE
%token <txt> FOR LOOP GENERATE
-%token <txt> AFTER AND OR XOR MOD UNIT
+%token <txt> AFTER AND OR XOR XNOR MOD UNIT
%token <txt> LASTVALUE EVENT POSEDGE NEGEDGE
%token <txt> STRING NAME RANGE NULLV
%token <txt> CONVFUNC_2 BASED
@@ -433,6 +450,7 @@
%type <e> expr
%type <e> simple_expr
%type <ss> signal
+%type <txt> opt_is
%right '='
/* Logic operators: */
@@ -441,6 +459,7 @@
/* Binary operators: */
%left OR
%left XOR
+%left XNOR
%left AND
%left MOD
/* Comparison: */
@@ -452,7 +471,7 @@
%error-verbose
/* rule for "...ELSE IF edge THEN..." causes 1 shift/reduce conflict */
-%expect 1
+%expect 2
/* glr-parser is needed because processes can start with if statements, but
* not have edges in them - more than one level of look-ahead is needed in that case
@@ -505,6 +524,9 @@
sl=addtxt(indents[indent],$1);
$$=addsl(sl,$2);}
;
+
+opt_is : /* Empty */ {$$=NULL;} | IS ;
+
/* tell the lexer to discard or keep comments ('-- ') - this makes the grammar much easier */
norem : /*Empty*/ {skipRem = 1;}
yesrem : /*Empty*/ {skipRem = 0;}
@@ -678,11 +700,7 @@
sglist *p;
if(dolist){
- if($3)
- sl=addtxt(NULL,"output");
- else
- sl=addtxt(NULL,"input");
-
+ sl=addtxt(NULL,inout_string($3));
sl=addpar(sl,$4);
p=$1;
for(;;){
@@ -712,11 +730,7 @@
sglist *p;
if(dolist){
- if($3)
- sl=addtxt(NULL,"output");
- else
- sl=addtxt(NULL,"input");
-
+ sl=addtxt(NULL,inout_string($3));
sl=addpar(sl,$4);
p=$1;
for(;;){
@@ -748,11 +762,13 @@
dir : IN { $$=0;}
| OUT { $$=1; }
+ | INOUT { $$=2; }
;
type : BIT {
$$=(vrange *) malloc(sizeof(vrange));
$$->vtype =tSCALAR;
+ $$->nlo = NULL;
}
| BITVECT '('vec_range ')' {$$=$3;}
| NAME {
@@ -817,7 +833,7 @@
}
| NAME '\'' RANGE {
/* lookup NAME and copy its vrange */
- $$=(vrange *) malloc(sizeof(vrange));
+ $$=(vrange *) malloc(sizeof(vrange)); /* useless memory leak */
sglist *sg = NULL;
if((sg=lookup(io_list,$1))==NULL) {
sg=lookup(sig_list,$1);
@@ -882,7 +898,6 @@
}
| a_decl CONSTANT NAME ':' type ':' '=' expr ';' rem {
slist * sl;
- char *natval = (char *) malloc(99*sizeof(char));
sl=addtxt($1,"parameter ");
sl=addtxt(sl,$3);
sl=addtxt(sl," = ");
@@ -941,6 +956,7 @@
if(k>0) {
char *natval = (char *) malloc(99*sizeof(char));
p->range->vtype = tVRANGE;
+ p->range->sizeval = k+1;
sprintf(natval, "%d",k);
p->range->nhi=addtxt(NULL,natval);
} else {
@@ -950,12 +966,12 @@
p->next=type_list;
type_list=p;
}
-/* 1 2 3 4r1 5 6 7 8r2 9 10 11 12r3 13 14 15 16 17r4 */
- | a_decl COMPONENT NAME rem PORT nolist '(' rem portlist ')' ';' rem END COMPONENT ';' yeslist rem {
- $$=addsl($1,$17); /* a_decl, rem4 */
+/* 1 2 3 4 5r1 6 7 8 9r2 10 11 12 13r3 14 15 16 17 18 19r4 */
+ | a_decl COMPONENT NAME opt_is rem PORT nolist '(' rem portlist ')' ';' rem END COMPONENT oname ';' yeslist rem {
+ $$=addsl($1,$19); /* a_decl, rem4 */
free($3); /* NAME */
- free($8); /* rem2 */
- free($12);/* rem3 */
+ free($9); /* rem2 */
+ free($13);/* rem3 */
}
/* 1 2 3 4r1 5 6 7 8r2 9 10 11 12 13 14 15r3 16 17 18 19r4 20 21 22 23 24r5 */
| a_decl COMPONENT NAME rem GENERIC nolist '(' rem genlist ')' ';' PORT nolist '(' rem portlist ')' ';' rem END COMPONENT ';' yeslist rem {
@@ -970,7 +986,7 @@
nolist : /*Empty*/ {dolist = 0;}
yeslist : /*Empty*/ {dolist = 1;}
-s_list : NAME {
+s_list : NAME rem {
sglist * sg;
if(dolist){
sg=(sglist *) malloc(sizeof(sglist));
@@ -982,12 +998,12 @@
$$=NULL;
}
}
- | NAME ',' s_list {
+ | NAME ',' rem s_list {
sglist * sg;
if(dolist){
sg=(sglist *) malloc(sizeof(sglist));
sg->name=$1;
- sg->next=$3;
+ sg->next=$4;
$$=sg;
} else{
free($1);
@@ -1038,8 +1054,8 @@
sl=addtxt(sl,"end\n\n");
$$=addsl(sl,$11);
}
- /* 1 2 3 4 5 6 7 8 9 10 11 12 13 */
- | rem NAME ':' NAME PORT MAP '(' doindent map_list ')' ';' unindent a_body {
+ /* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 */
+ | rem NAME ':' NAME PORT MAP '(' doindent map_list rem ')' ';' unindent a_body {
slist *sl;
sl=addsl($1,indents[indent]);
sl=addtxt(sl,$4); /* NAME2 */
@@ -1049,7 +1065,7 @@
sl=addsl(sl,indents[indent]);
sl=addsl(sl,$9); /* map_list */
sl=addtxt(sl,");\n\n");
- $$=addsl(sl,$13); /* a_body */
+ $$=addsl(sl,$14); /* a_body */
}
/* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 */
| rem NAME ':' NAME GENERIC MAP '(' doindent generic_map_list ')' unindent PORT MAP '(' doindent map_list ')' ';' unindent a_body {
@@ -1797,6 +1813,7 @@
| expr AND expr {$$=addexpr($1,'&'," & ",$3);}
| expr OR expr {$$=addexpr($1,'|'," | ",$3);}
| expr XOR expr {$$=addexpr($1,'^'," ^ ",$3);}
+ | expr XNOR expr {$$=addexpr(NULL,'~'," ~",addexpr($1,'^'," ^ ",$3));}
| BITVECT '(' expr ')' {
/* single argument type conversion function e.g. std_ulogic_vector(x) */
expdata *e;
@@ -2018,7 +2035,7 @@
char *outfile; /* Output file */
char *sourcefile; /* Input file */
-main(int argc, char *argv[]){
+int main(int argc, char *argv[]){
int i,j;
char *s;
slist *sl;
--- NEW FILE vhd2vl.spec ---
Name: vhd2vl
Version: 2.0
Release: 3%{?dist}
Summary: VHDL to Verilog translator
License: GPLv2+
Group: Applications/Engineering
Url: http://doolittle.icarus.com/~larry/%{name}/
Source0: http://doolittle.icarus.com/~larry/%{name}/%{name}-%{version}.tar.gz
# http://doolittle.icarus.com/~larry/vhd2vl/v2.01.patch
Patch0: %{name}-v2.01.patch
Patch1: %{name}-typo.patch
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
BuildRequires: flex bison
%description
vhd2vl is a VHDL to Verilog translation program.
It targets the translation of synthetisable RTL.
While far from complete it supports a useful
subset of VHDL, sufficient for complex designs.
%prep
%setup -q -n %{name}
%patch0 -p1 -b .dolitte
%patch1 -p0 -b .typo
%{__sed} -i "s|gcc -Wall|gcc %{optflags}|" src/makefile
%build
%{__make} %{?_smp_mflags} -C src
%install
%{__rm} -rf %{buildroot}
%{__mkdir} -p %{buildroot}%{_bindir}
%{__install} -pm 755 src/%{name} %{buildroot}%{_bindir}
%clean
%{__rm} -rf %{buildroot}
%files
%defattr(-,root,root)
%{_bindir}/%{name}
%doc README.txt
%doc examples translated_examples/
%changelog
* Mon Dec 15 2008 Chitlesh Goorah <chitlesh [AT] fedoraproject DOT org> 2.0-3
- fix for bison 2.4-2.fc11
* Sun Dec 14 2008 Chitlesh Goorah <chitlesh [AT] fedoraproject DOT org> 2.0-2
- enabled parallel build
* Sat Dec 06 2008 Chitlesh Goorah <chitlesh [AT] fedoraproject DOT org> 2.0-1
- Initial package for fedora
Index: .cvsignore
===================================================================
RCS file: /cvs/pkgs/rpms/vhd2vl/F-9/.cvsignore,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- .cvsignore 18 Dec 2008 00:13:30 -0000 1.1
+++ .cvsignore 20 Dec 2008 17:58:12 -0000 1.2
@@ -0,0 +1 @@
+vhd2vl-2.0.tar.gz
Index: sources
===================================================================
RCS file: /cvs/pkgs/rpms/vhd2vl/F-9/sources,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- sources 18 Dec 2008 00:13:30 -0000 1.1
+++ sources 20 Dec 2008 17:58:12 -0000 1.2
@@ -0,0 +1 @@
+2a05690b0a0f35a019f0f10af4d21d2a vhd2vl-2.0.tar.gz
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