rpms/xorg-x11-server/F-8 xorg-server-1.3.0.0-0001-X86EMU-handle-CPUID-instruction.patch, NONE, 1.1 xorg-server-1.3.0.0-0002-X86EMU-added-blacklist-for-I-O-port-in-0-0xFF-range.patch, NONE, 1.1 xorg-server-1.3.0.0-0003-X86EMU-when-emulating-PCI-access-use-the-correct-d.patch, NONE, 1.1 xorg-server-1.3.0.0-geode-gx2-lx-autodetect.patch, NONE, 1.1 xorg-server-1.3.0.0-prefer-openchrome-ugly-hack.patch, NONE, 1.1 xorg-x11-server.spec, 1.270, 1.271

Warren Togami 砥上勇 (wtogami) fedora-extras-commits at redhat.com
Sun Mar 2 21:31:42 UTC 2008


Author: wtogami

Update of /cvs/pkgs/rpms/xorg-x11-server/F-8
In directory cvs-int.fedora.redhat.com:/tmp/cvs-serv18870

Modified Files:
	xorg-x11-server.spec 
Added Files:
	xorg-server-1.3.0.0-0001-X86EMU-handle-CPUID-instruction.patch 
	xorg-server-1.3.0.0-0002-X86EMU-added-blacklist-for-I-O-port-in-0-0xFF-range.patch 
	xorg-server-1.3.0.0-0003-X86EMU-when-emulating-PCI-access-use-the-correct-d.patch 
	xorg-server-1.3.0.0-geode-gx2-lx-autodetect.patch 
	xorg-server-1.3.0.0-prefer-openchrome-ugly-hack.patch 
Log Message:
- xorg-server-1.3.0.0-prefer-openchrome-ugly-hack.patch:
  Prefer openchrome to via driver during autoconfiguration.
- xorg-server-1.3.0.0-0001-X86EMU-handle-CPUID-instruction.patch
  xorg-server-1.3.0.0-0002-X86EMU-added-blacklist-for-I-O-port-in-0-0xFF-range.patch
  xorg-server-1.3.0.0-0003-X86EMU-when-emulating-PCI-access-use-the-correct-d.patch
  X86EMU fixes that allow amd driver work with a few broken BIOS
- xorg-server-1.3.0.0-geode-gx2-lx-autodetect.patch:
  Autoconfigure AMD Geode GX2 100b:0030
                AMD Geode LX  1022:2081


xorg-server-1.3.0.0-0001-X86EMU-handle-CPUID-instruction.patch:

--- NEW FILE xorg-server-1.3.0.0-0001-X86EMU-handle-CPUID-instruction.patch ---
>From 6b31b336b9f960a86f8cace29e82c90c944c7fd0 Mon Sep 17 00:00:00 2001
From: Bart Trojanowski <bart at symbio-technologies.com>
Date: Sat, 2 Feb 2008 12:21:57 -0500
Subject: [PATCH] X86EMU: handle CPUID instruction

This bug is tracked here:
https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-amd/+bug/180742

After trying to switch from X to VT (or just quit) the video-amd driver
attempts to issue INT 10/0 to go to mode 3 (VGA).  The emulator, running
the BIOS code, would then spit out:

        c000:0282: A2 ILLEGAL EXTENDED X86 OPCODE!

The opcode was 0F A2, or CPUID; it was not implemented in the emulator.
This simple patch, against 1.3.0.0, handles the CPUID instruction in one of
two ways:
 1) if ran on __i386__ or __x86_64__ then it calls the CPUID instruction
     directly.
 2) if ran elsewhere it returns a canned 486dx4 set of values for
     function 1.

This fix allows the video-amd driver to switch back to console mode,
with the GSW BIOS.

Thanks to Symbio Technologies for funding my work, and ThinCan for
providing hardware :)

Signed-off-by: Bart Trojanowski <bart at jukie.net>
Acked-by: Eric Anholt <eric at anholt.net>
---
 hw/xfree86/x86emu/ops2.c                |   16 ++++++-
 hw/xfree86/x86emu/prim_ops.c            |   59 +++++++++++++++++++++++
 hw/xfree86/x86emu/x86emu/prim_ops.h     |    1 +
 hw/xfree86/x86emu/x86emu/prim_x86_gcc.h |   79 +++++++++++++++++++++++++++++++
 4 files changed, 154 insertions(+), 1 deletions(-)
 create mode 100644 hw/xfree86/x86emu/x86emu/prim_x86_gcc.h

diff --git a/hw/xfree86/x86emu/ops2.c b/hw/xfree86/x86emu/ops2.c
index 8c6c535..324de8a 100644
--- a/hw/xfree86/x86emu/ops2.c
+++ b/hw/xfree86/x86emu/ops2.c
@@ -328,6 +328,20 @@ static void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
 }
 
 /****************************************************************************
+REMARKS: CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
+Handles opcode 0x0f,0xa2
+****************************************************************************/
+static void x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
+{
+    START_OF_INSTR();
+    DECODE_PRINTF("CPUID\n");
+    TRACE_AND_STEP();
+    cpuid();
+    DECODE_CLEAR_SEGOVR();
+    END_OF_INSTR();
+}
+
+/****************************************************************************
 REMARKS:
 Handles opcode 0x0f,0xa3
 ****************************************************************************/
@@ -2734,7 +2748,7 @@ void (*x86emu_optab2[256])(u8) =
 
 /*  0xa0 */ x86emuOp2_push_FS,
 /*  0xa1 */ x86emuOp2_pop_FS,
-/*  0xa2 */ x86emuOp2_illegal_op,
+/*  0xa2 */ x86emuOp2_cpuid,
 /*  0xa3 */ x86emuOp2_bt_R,
 /*  0xa4 */ x86emuOp2_shld_IMM,
 /*  0xa5 */ x86emuOp2_shld_CL,
diff --git a/hw/xfree86/x86emu/prim_ops.c b/hw/xfree86/x86emu/prim_ops.c
index b9e7257..ca56cae 100644
--- a/hw/xfree86/x86emu/prim_ops.c
+++ b/hw/xfree86/x86emu/prim_ops.c
@@ -102,6 +102,12 @@
 #define	PRIM_OPS_NO_REDEFINE_ASM
 #include "x86emu/x86emui.h"
 
+#if defined(__GNUC__)
+# if defined (__i386__) || defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__)
+#  include "x86emu/prim_x86_gcc.h"
+# endif
+#endif
+
 /*------------------------- Global Variables ------------------------------*/
 
 static u32 x86emu_parity_tab[8] =
@@ -2654,3 +2660,56 @@ DB(	if (CHECK_SP_ACCESS())
     return res;
 }
 
+/****************************************************************************
+REMARKS:
+CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
+****************************************************************************/
+void cpuid (void)
+{
+    u32 feature = M.x86.R_EAX;
+#ifdef X86EMU_HAS_HW_CPUID
+        // If the platform allows it, we will base our values on the real
+        // results from the CPUID instruction.  We limit support to the 
+        // first two features, and the results of those are sanitized.
+        if (feature <= 1)
+            hw_cpuid(&M.x86.R_EAX, &M.x86.R_EBX, &M.x86.R_ECX, &M.x86.R_EDX);
+#endif
+    switch (feature) {
+    case 0:
+        // Regardless if we have real data from the hardware, the emulator
+        // will only support upto feature 1, which we set in register EAX.
+        // Registers EBX:EDX:ECX contain a string identifying the CPU.
+        M.x86.R_EAX = 1;
+#ifndef X86EMU_HAS_HW_CPUID
+        // EBX:EDX:ECX = "GenuineIntel"
+        M.x86.R_EBX = 0x756e6547;
+        M.x86.R_EDX = 0x49656e69;
+        M.x86.R_ECX = 0x6c65746e;
+#endif
+        break;
+    case 1:
+#ifndef X86EMU_HAS_HW_CPUID
+        // If we don't have x86 compatible hardware, we return values from an
+        // Intel 486dx4; which was one of the first processors to have CPUID.
+        M.x86.R_EAX = 0x00000480;
+        M.x86.R_EBX = 0x00000000;
+        M.x86.R_ECX = 0x00000000;
+        M.x86.R_EDX = 0x00000002;	// VME
+#else
+        // In the case that we have hardware CPUID instruction, we make sure
+        // that the features reported are limited to TSC and VME.
+        M.x86.R_EDX &= 0x00000012;
+#endif
+        break;
+    default:
+        // Finally, we don't support any additional features.  Most CPUs
+        // return all zeros when queried for invalid or unsupported feature
+        // numbers.
+        M.x86.R_EAX = 0;
+        M.x86.R_EBX = 0;
+        M.x86.R_ECX = 0;
+        M.x86.R_EDX = 0;
+        break;
+    }
+}
+
diff --git a/hw/xfree86/x86emu/x86emu/prim_ops.h b/hw/xfree86/x86emu/x86emu/prim_ops.h
index bea8357..6ac2a29 100644
--- a/hw/xfree86/x86emu/x86emu/prim_ops.h
+++ b/hw/xfree86/x86emu/x86emu/prim_ops.h
@@ -133,6 +133,7 @@ void    push_word (u16 w);
 void    push_long (u32 w);
 u16     pop_word (void);
 u32		pop_long (void);
+void    cpuid (void);
 
 #ifdef  __cplusplus
 }                       			/* End of "C" linkage for C++   	*/
diff --git a/hw/xfree86/x86emu/x86emu/prim_x86_gcc.h b/hw/xfree86/x86emu/x86emu/prim_x86_gcc.h
new file mode 100644
index 0000000..c085ddc
--- /dev/null
+++ b/hw/xfree86/x86emu/x86emu/prim_x86_gcc.h
@@ -0,0 +1,79 @@
+/****************************************************************************
+*
+* Inline helpers for x86emu
+*
+* Copyright (C) 2008 Bart Trojanowski, Symbio Technologies, LLC
+*
+*  ========================================================================
+*
+*  Permission to use, copy, modify, distribute, and sell this software and
+*  its documentation for any purpose is hereby granted without fee,
+*  provided that the above copyright notice appear in all copies and that
+*  both that copyright notice and this permission notice appear in
+*  supporting documentation, and that the name of the authors not be used
+*  in advertising or publicity pertaining to distribution of the software
+*  without specific, written prior permission.  The authors makes no
+*  representations about the suitability of this software for any purpose.
+*  It is provided "as is" without express or implied warranty.
+*
+*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+*  PERFORMANCE OF THIS SOFTWARE.
+*
+*  ========================================================================
+*
+* Language:     GNU C
+* Environment:  GCC on i386 or x86-64
+* Developer:    Bart Trojanowski
+*
+* Description:  This file defines a few x86 macros that can be used by the
+*               emulator to execute native instructions.
+*
+*               For PIC vs non-PIC code refer to:
+*               http://sam.zoy.org/blog/2007-04-13-shlib-with-non-pic-code-have-inline-assembly-and-pic-mix-well
+*
+****************************************************************************/
+#ifndef __X86EMU_PRIM_X86_GCC_H
+#define __X86EMU_PRIM_X86_GCC_H
+
+#include "x86emu/types.h"
+
+#if !defined(__GNUC__) || !(defined (__i386__) || defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__))
+#error This file is intended to be used by gcc on i386 or x86-64 system
+#endif
+
+#if defined(__PIC__) && defined(__i386__)
+
+#define X86EMU_HAS_HW_CPUID 1
+static inline void hw_cpuid (u32 *a, u32 *b, u32 *c, u32 *d)
+{
+    __asm__ __volatile__ ("pushl %%ebx      \n\t"
+                          "cpuid            \n\t"
+                          "movl %%ebx, %1   \n\t"
+                          "popl %%ebx       \n\t"
+                          : "=a" (*a), "=r" (*b),
+                            "=c" (*c), "=d" (*d)
+                          : "a" (*a), "c" (*c)
+                          : "cc");
+}
+
+#else // ! (__PIC__ && __i386__)
+
+#define X86EMU_HAS_HW_CPUID 1
+static inline void hw_cpuid (u32 *a, u32 *b, u32 *c, u32 *d)
+{
+    __asm__ __volatile__ ("cpuid"
+                          : "=a" (*a), "=b" (*b),
+                            "=c" (*c), "=d" (*d)
+                          : "a" (*a), "c" (*c)
+                          : "cc");
+}
+
+#endif // __PIC__ && __i386__
+
+
+#endif // __X86EMU_PRIM_X86_GCC_H
-- 
1.5.3.7.1150.g149d432


xorg-server-1.3.0.0-0002-X86EMU-added-blacklist-for-I-O-port-in-0-0xFF-range.patch:

--- NEW FILE xorg-server-1.3.0.0-0002-X86EMU-added-blacklist-for-I-O-port-in-0-0xFF-range.patch ---
>From 3fd434670e4c371c5a1970982fdb6039b5bdf5fe Mon Sep 17 00:00:00 2001
From: Bart Trojanowski <bart at symbio-technologies.com>
Date: Tue, 19 Feb 2008 20:44:40 -0500
Subject: [PATCH] X86EMU: added blacklist for I/O port in 0-0xFF range

This patch adds a test just before x86emu accesses real I/O ports.
The intent is to prevent access to ports that are know to be under
the kernel's control.  Accessing these from the X process could cause
catastrophic failure of the system, as it had occurred on all Geode
systems with the General Software VGA BIOS.

If such an access is detected, we terminate X "gracefully" by sending
a SIGSEGV signal which is picked up by xf86SigHandler(), it then dumps
the backtrace and exits gracefully.  Note that exiting here avoids a
system corruption or freeze.

This patch was based on help from Alan Cox.

Thanks to Symbio Technologies for funding my work, and ThinCan for
providing hardware :)

Signed-off-by: Bart Trojanowski <bart at jukie.net>
---
 hw/xfree86/int10/helper_exec.c |   92 +++++++++++++++++++++++++++++++++++++---
 1 files changed, 86 insertions(+), 6 deletions(-)

diff --git a/hw/xfree86/int10/helper_exec.c b/hw/xfree86/int10/helper_exec.c
index d80de89..babf99c 100644
--- a/hw/xfree86/int10/helper_exec.c
+++ b/hw/xfree86/int10/helper_exec.c
@@ -19,6 +19,8 @@
 #endif
 
 #include <unistd.h>
+#include <sys/types.h>
+#include <signal.h>
 
 #include <X11/Xos.h>
 #include "xf86.h"
@@ -203,6 +205,72 @@ stack_trace(xf86Int10InfoPtr pInt)
 	xf86ErrorFVerb(3, "\n");
 }
 
+enum port_action_e {
+	PORT_ACTION_PERMIT,
+	PORT_ACTION_WARN,
+	PORT_ACTION_BAIL,
+	PORT_ACTION_MAX
+};
+
+static const struct port_range {
+	CARD16 start, end;
+	enum port_action_e access;
+} port_range_table[] = {
+	// NOTE: port ranges are non overlapping and sorted
+	{ 0x00, 0x1f, PORT_ACTION_BAIL },	// DMA
+	{ 0x20, 0x21, PORT_ACTION_BAIL },	// PIC
+	{ 0x40, 0x47, PORT_ACTION_BAIL },	// PIT 1&2
+	{ 0x50, 0x53, PORT_ACTION_BAIL },
+	{ 0x70, 0x77, PORT_ACTION_BAIL },	// CMOS/RTC
+	{ 0x81, 0x8f, PORT_ACTION_BAIL },	// DIAG REGS
+	{ 0xa0, 0xa1, PORT_ACTION_BAIL },	// PIC2
+	{ 0xc0, 0xdf, PORT_ACTION_BAIL },	// DMA
+};
+#define ARRAY_SIZE(X) (sizeof((X)) / (sizeof(*(X))))
+#define ARRAY_END(X)  (&((X)[ARRAY_SIZE(X)]))
+
+static void assert_port_access_allowed (CARD16 port, CARD16 width)
+{
+	CARD16 access_start, access_end;
+	const struct port_range *pr, *pr_start, *pr_end;
+
+	access_start = port;
+	access_end = port + width - 1;
+
+	// TODO: if the list gets too long we should do a binary search
+	//        or convert the port list to a bitmap representation
+	pr_start = port_range_table;
+	pr_end   = ARRAY_END(port_range_table);
+
+	for (pr = pr_start; pr < pr_end; pr++) {
+		if (access_end < pr->start)
+			continue;
+		if (access_start > pr->end)
+			break;
+
+		// we are in the pr range now
+		switch (pr->access) {
+		default:
+			continue;
+		case PORT_ACTION_BAIL:
+		case PORT_ACTION_WARN:
+			break;
+		}
+
+		ErrorF("Emulator asked to make a suspect %saccess to "
+				"port %u (0x%04x)%s\n",
+				(width == 1) ? "byte " :
+				(width == 2) ? "word " :
+				(width == 4) ? "long " : "",
+				port, port,
+				(pr->access == PORT_ACTION_BAIL)
+				? "; terminating." : "ignoring.");
+
+		if (pr->access == PORT_ACTION_BAIL)
+			kill(getpid(), SIGSEGV);
+	}
+}
+
 int
 port_rep_inb(xf86Int10InfoPtr pInt,
 	     CARD16 port, CARD32 base, int d_f, CARD32 count)
@@ -328,8 +396,10 @@ x_inb(CARD16 port)
 	}
 #endif /* __NOT_YET__ */
     } else {
-	if (!pciCfg1inb(port, &val))
+	if (!pciCfg1inb(port, &val)) {
+	    assert_port_access_allowed (port, sizeof(val));
 	    val = inb(Int10Current->ioBase + port);
+	}
 #ifdef PRINT_PORT
 	ErrorF(" inb(%#x) = %2.2x\n", port, val);
 #endif
@@ -352,8 +422,10 @@ x_inw(CARD16 port)
 	X_GETTIMEOFDAY(&tv);
 	val = (CARD16)(tv.tv_usec / 3);
     } else {
-	if (!pciCfg1inw(port, &val))
+	if (!pciCfg1inw(port, &val)) {
+	    assert_port_access_allowed (port, sizeof(val));
 	    val = inw(Int10Current->ioBase + port);
+	}
     }
 #ifdef PRINT_PORT
     ErrorF(" inw(%#x) = %4.4x\n", port, val);
@@ -390,8 +462,10 @@ x_outb(CARD16 port, CARD8 val)
 #ifdef PRINT_PORT
 	ErrorF(" outb(%#x, %2.2x)\n", port, val);
 #endif
-	if (!pciCfg1outb(port, val))
+	if (!pciCfg1outb(port, val)) {
+	    assert_port_access_allowed (port, sizeof(val));
 	    outb(Int10Current->ioBase + port, val);
+	}
     }
 }
 
@@ -402,8 +476,10 @@ x_outw(CARD16 port, CARD16 val)
     ErrorF(" outw(%#x, %4.4x)\n", port, val);
 #endif
 
-    if (!pciCfg1outw(port, val))
+    if (!pciCfg1outw(port, val)) {
+	assert_port_access_allowed (port, sizeof(val));
 	outw(Int10Current->ioBase + port, val);
+    }
 }
 
 CARD32
@@ -411,8 +487,10 @@ x_inl(CARD16 port)
 {
     CARD32 val;
 
-    if (!pciCfg1in(port, &val))
+    if (!pciCfg1in(port, &val)) {
+	assert_port_access_allowed (port, sizeof(val));
 	val = inl(Int10Current->ioBase + port);
+    }
 
 #ifdef PRINT_PORT
     ErrorF(" inl(%#x) = %8.8x\n", port, val);
@@ -427,8 +505,10 @@ x_outl(CARD16 port, CARD32 val)
     ErrorF(" outl(%#x, %8.8x)\n", port, val);
 #endif
 
-    if (!pciCfg1out(port, val))
+    if (!pciCfg1out(port, val)) {
+	assert_port_access_allowed (port, sizeof(val));
 	outl(Int10Current->ioBase + port, val);
+    }
 }
 
 CARD8
-- 
1.5.3.7.1150.g149d432


xorg-server-1.3.0.0-0003-X86EMU-when-emulating-PCI-access-use-the-correct-d.patch:

--- NEW FILE xorg-server-1.3.0.0-0003-X86EMU-when-emulating-PCI-access-use-the-correct-d.patch ---
>From 8746d1e3a7844e1030eefc6e160756ec43bce246 Mon Sep 17 00:00:00 2001
From: Bart Trojanowski <bart at symbio-technologies.com>
Date: Fri, 11 Jan 2008 19:59:54 -0500
Subject: [PATCH] X86EMU: when emulating PCI access, use the correct device

When in x86emu, the PCI emulation routines were being given the TAG of
the video device regardless of what the BIOS code that is being emulated
asked for.

This patch uses the bus:dev:fn numbers that were passed to 0xCF8 when
calling the libpciaccess functions after an access to 0xCFC.

Thanks to Symbio Technologies for funding my work, and ThinCan for
providing hardware :)

Signed-off-by: Bart Trojanowski <bart at jukie.net>
---
 hw/xfree86/int10/helper_exec.c |   15 ++++++++-------
 1 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/hw/xfree86/int10/helper_exec.c b/hw/xfree86/int10/helper_exec.c
index babf99c..cc95ef3 100644
--- a/hw/xfree86/int10/helper_exec.c
+++ b/hw/xfree86/int10/helper_exec.c
@@ -549,7 +549,8 @@ Mem_wl(CARD32 addr, CARD32 val)
 
 static CARD32 PciCfg1Addr = 0;
 
-#define OFFSET(Cfg1Addr) (Cfg1Addr & 0xff)
+#define PCI_OFFSET(x) ((x) & 0x000000ff)
+#define PCI_TAG(x)    ((x) & 0x00ffff00)
 
 static int
 pciCfg1in(CARD16 addr, CARD32 *val)
@@ -559,7 +560,7 @@ pciCfg1in(CARD16 addr, CARD32 *val)
 	return 1;
     }
     if (addr == 0xCFC) {
-	*val = pciReadLong(Int10Current->Tag, OFFSET(PciCfg1Addr));
+	*val = pciReadLong(PCI_TAG(PciCfg1Addr), PCI_OFFSET(PciCfg1Addr));
 	return 1;
     }
     return 0;
@@ -573,7 +574,7 @@ pciCfg1out(CARD16 addr, CARD32 val)
 	return 1;
     }
     if (addr == 0xCFC) {
-	pciWriteLong(Int10Current->Tag, OFFSET(PciCfg1Addr), val);
+	pciWriteLong(PCI_TAG(PciCfg1Addr), PCI_OFFSET(PciCfg1Addr), val);
 	return 1;
     }
     return 0;
@@ -591,7 +592,7 @@ pciCfg1inw(CARD16 addr, CARD16 *val)
     }
     if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
 	offset = addr - 0xCFC;
-	*val = pciReadWord(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset);
+	*val = pciReadWord(PCI_TAG(PciCfg1Addr), PCI_OFFSET(PciCfg1Addr) + offset);
 	return 1;
     }
     return 0;
@@ -610,7 +611,7 @@ pciCfg1outw(CARD16 addr, CARD16 val)
     }
     if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
 	offset = addr - 0xCFC;
-	pciWriteWord(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset, val);
+	pciWriteWord(PCI_TAG(PciCfg1Addr), PCI_OFFSET(PciCfg1Addr) + offset, val);
 	return 1;
     }
     return 0;
@@ -628,7 +629,7 @@ pciCfg1inb(CARD16 addr, CARD8 *val)
     }
     if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
 	offset = addr - 0xCFC;
-	*val = pciReadByte(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset);
+	*val = pciReadByte(PCI_TAG(PciCfg1Addr), PCI_OFFSET(PciCfg1Addr) + offset);
 	return 1;
     }
     return 0;
@@ -647,7 +648,7 @@ pciCfg1outb(CARD16 addr, CARD8 val)
     }
     if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
 	offset = addr - 0xCFC;
-	pciWriteByte(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset, val);
+	pciWriteByte(PCI_TAG(PciCfg1Addr), PCI_OFFSET(PciCfg1Addr) + offset, val);
 	return 1;
     }
     return 0;
-- 
1.5.3.7.1150.g149d432


xorg-server-1.3.0.0-geode-gx2-lx-autodetect.patch:

--- NEW FILE xorg-server-1.3.0.0-geode-gx2-lx-autodetect.patch ---
diff -urN xorg-server-1.3.0.0.orig/hw/xfree86/common/xf86AutoConfig.c xorg-server-1.3.0.0/hw/xfree86/common/xf86AutoConfig.c
--- xorg-server-1.3.0.0.orig/hw/xfree86/common/xf86AutoConfig.c	2008-03-02 15:07:48.000000000 -0500
+++ xorg-server-1.3.0.0/hw/xfree86/common/xf86AutoConfig.c	2008-03-02 15:21:19.000000000 -0500
@@ -160,12 +160,18 @@
 {
     /*
      * things not handled yet:
-     * amd/cyrix/nsc
+     * cyrix/nsc
      * xgi
      */
 
     switch (info->vendor)
     {
+        case 0x100b:
+	    if (info->chipType == 0x0030)
+	        return "amd";
+        case 0x1022:
+	    if (info->chipType == 0x2081)
+	        return "amd";
 	case 0x1142:		    return "apm";
 	case 0xedd8:		    return "ark";
 	case 0x1a03:		    return "ast";

xorg-server-1.3.0.0-prefer-openchrome-ugly-hack.patch:

--- NEW FILE xorg-server-1.3.0.0-prefer-openchrome-ugly-hack.patch ---
--- xorg-server-1.3.0.0/hw/xfree86/common/xf86AutoConfig.c.orig	2008-02-28 17:00:39.000000000 -0500
+++ xorg-server-1.3.0.0/hw/xfree86/common/xf86AutoConfig.c	2008-02-28 17:32:45.000000000 -0500
@@ -203,7 +203,13 @@
 	case 0x3d3d:		    return "glint";
 	case 0x1023:		    return "trident";
 	case 0x100c:		    return "tseng";
-	case 0x1106:		    return "via";
+	case 0x1106:		    
+            /* Prefer openchrome if available before via driver */
+            if(!access(DEFAULT_MODULE_PATH "/drivers/openchrome_drv.so", R_OK)) {
+                                    return "openchrome";
+            } else {
+                                    return "via";
+            }
 	case 0x15ad:		    return "vmware";
 	default: break;
     }


Index: xorg-x11-server.spec
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-server/F-8/xorg-x11-server.spec,v
retrieving revision 1.270
retrieving revision 1.271
diff -u -r1.270 -r1.271
--- xorg-x11-server.spec	12 Feb 2008 16:46:24 -0000	1.270
+++ xorg-x11-server.spec	2 Mar 2008 21:30:46 -0000	1.271
@@ -9,7 +9,7 @@
 Summary:   X.Org X11 X server
 Name:      xorg-x11-server
 Version:   1.3.0.0
-Release:   42%{?dist}
+Release:   43%{?dist}
 URL:       http://www.x.org
 License:   MIT
 Group:     User Interface/X
@@ -81,6 +81,11 @@
 Patch2018:  xserver-1.3.0-late-sigusr1.patch
 Patch2019:  xserver-1.3.0-yet-more-vt-ioctl-hate.patch
 Patch2020:  xserver-1.3.0-update-edid-quirks.patch
+Patch2021:  xorg-server-1.3.0.0-prefer-openchrome-ugly-hack.patch
+Patch2022:  xorg-server-1.3.0.0-0001-X86EMU-handle-CPUID-instruction.patch
+Patch2023:  xorg-server-1.3.0.0-0003-X86EMU-when-emulating-PCI-access-use-the-correct-d.patch
+Patch2024:  xorg-server-1.3.0.0-0002-X86EMU-added-blacklist-for-I-O-port-in-0-0xFF-range.patch
+Patch2025:  xorg-server-1.3.0.0-geode-gx2-lx-autodetect.patch
 
 # assorted PCI layer shenanigans.  oh the pain.
 Patch2500:  xorg-x11-server-1.2.99-unbreak-domain.patch
@@ -360,6 +365,11 @@
 %patch2018 -p1 -b .sigusr1
 %patch2019 -p1 -b .vt-ioctl-hate
 %patch2020 -p1 -b .more-quirk-patch
+%patch2021 -p1 -b .prefer-openchrome-ugly-hack
+%patch2022 -p1 -b .X86EMU-handle-CPUID-instruction
+%patch2023 -p1 -b .X86EMU-added-blacklist
+%patch2024 -p1 -b .X86EMU-when-emulating-PCI
+%patch2025 -p1 -b .geode-gx2-lx-autodetect
 
 %patch2500 -p1 -b .unbreak-domains
 %patch2501 -p1 -b .pci-bus-count
@@ -643,6 +653,17 @@
 
 
 %changelog
+* Sun Mar 02 2008 Warren Togami <wtogami at redhat.com> 1.3.0.0-43
+- xorg-server-1.3.0.0-prefer-openchrome-ugly-hack.patch:
+  Prefer openchrome to via driver during autoconfiguration.
+- xorg-server-1.3.0.0-0001-X86EMU-handle-CPUID-instruction.patch
+  xorg-server-1.3.0.0-0002-X86EMU-added-blacklist-for-I-O-port-in-0-0xFF-range.patch
+  xorg-server-1.3.0.0-0003-X86EMU-when-emulating-PCI-access-use-the-correct-d.patch
+  X86EMU fixes that allow amd driver work with a few broken BIOS
+- xorg-server-1.3.0.0-geode-gx2-lx-autodetect.patch:
+  Autoconfigure AMD Geode GX2 100b:0030
+                AMD Geode LX  1022:2081
+
 * Tue Feb 12 2008 Adam Jackson <ajax at redhat.com> 1.3.0.0-42
 - xserver-1.3.0-avoid-ps2-probe.patch: Delete an irrelevant hunk against
   the module loader that broke Xorg -configure.  (#397461)




More information about the fedora-extras-commits mailing list