rpms/xorg-x11-drv-i810/devel intel-2.6.0-to-7db3201.patch,NONE,1.1
Kristian Høgsberg
krh at fedoraproject.org
Tue Jan 20 21:51:40 UTC 2009
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Author: krh
Update of /cvs/pkgs/rpms/xorg-x11-drv-i810/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv2994
Added Files:
intel-2.6.0-to-7db3201.patch
Log Message:
* Tue Jan 20 2009 Kristian Høgsberg <krh at kabuto.bos.redhat.com> 2.6.0-1
- Update to 2.6.0.
intel-2.6.0-to-7db3201.patch:
--- NEW FILE intel-2.6.0-to-7db3201.patch ---
diff --git a/configure.ac b/configure.ac
index bb69f72..38d373e 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-intel],
- 2.6.0,
+ 2.6.99.1,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-intel)
@@ -105,8 +105,6 @@ if test x$DRI != xno; then
[have_sarea_h="yes"], [have_sarea_h="no"])
AC_CHECK_FILE([${sdkdir}/dristruct.h],
[have_dristruct_h="yes"], [have_dristruct_h="no"])
- AC_CHECK_FILE([${sdkdir}/damage.h],
- [have_damage_h="yes"], [have_damage_h="no"])
fi
AC_MSG_CHECKING([whether to include DRI support])
if test x$DRI = xauto; then
@@ -215,9 +213,6 @@ if test "$DRI" = yes; then
PKG_CHECK_MODULES(DRI, [xf86driproto glproto])
AC_DEFINE(XF86DRI,1,[Enable DRI driver support])
AC_DEFINE(XF86DRI_DEVEL,1,[Enable developmental DRI driver support])
- if test "$have_damage_h" = yes; then
- AC_DEFINE(DAMAGE,1,[Use Damage extension])
- fi
fi
dnl exaGetPixmapDriverPrivate required for DRM_MODE.
diff --git a/man/intel.man b/man/intel.man
index 00aa1be..65d1114 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -150,26 +150,6 @@ pool. On systems with a working GEM environment, this can be disabled to
increase the memory pool available to other graphics tasks.
Default for i830 and newer: Enabled.
Default for i810: this option is not used.
-.BI "Option \*qPageFlip\*q \*q" boolean \*q
-Enable support for page flipping. This should improve 3D performance at the
-potential cost of worse performance with mixed 2D/3D. Also note that this gives
-no benefit without corresponding support in the Mesa 3D driver and may not give
-the full benefit without triple buffering (see
-.B "Option \*qTripleBuffer\*q"
-).
-Default for i810: The option is not used.
-Default for i830 and above: Disabled (This option is currently unstable).
-.TP
-.BI "Option \*qTripleBuffer\*q \*q" boolean \*q
-Enable support for triple buffering. This should improve 3D performance at the
-potential cost of worse performance with mixed 2D/3D. Also note that this gives
-no benefit without corresponding support in the Mesa 3D driver and may not give
-any benefit without page flipping either (see
-.B "Option \*qPageFlip\*q"
-).
-Default for i810: The option is not used.
-Default for i830 and above: Disabled.
-.TP
.BI "Option \*qAccelMethod\*q \*q" string \*q
Choose acceleration architecture, either "XAA" or "EXA". XAA is the old
XFree86 based acceleration architecture. EXA is a newer and simpler
diff --git a/src/bios_reader/bios_reader.c b/src/bios_reader/bios_reader.c
index 717f5bf..4b20e0d 100644
--- a/src/bios_reader/bios_reader.c
+++ b/src/bios_reader/bios_reader.c
@@ -299,6 +299,9 @@ static void dump_lvds_data(void)
struct bdb_lvds_lfp_data *lvds_data;
int num_entries;
int i;
+ int hdisplay, hsyncstart, hsyncend, htotal;
+ int vdisplay, vsyncstart, vsyncend, vtotal;
+ float clock;
block = find_section(BDB_LVDS_LFP_DATA);
if (!block) {
@@ -322,6 +325,17 @@ static void dump_lvds_data(void)
else
marker = ' ';
+ hdisplay = _H_ACTIVE(timing_data);
+ hsyncstart = hdisplay + _H_SYNC_OFF(timing_data);
+ hsyncend = hsyncstart + _H_SYNC_WIDTH(timing_data);
+ htotal = hdisplay + _H_BLANK(timing_data);
+
+ vdisplay = _V_ACTIVE(timing_data);
+ vsyncstart = vdisplay + _V_SYNC_OFF(timing_data);
+ vsyncend = vsyncstart + _V_SYNC_WIDTH(timing_data);
+ vtotal = vdisplay + _V_BLANK(timing_data);
+ clock = _PIXEL_CLOCK(timing_data) / 1000;
+
printf("%c\tpanel type %02i: %dx%d clock %d\n", marker,
i, lfp_data->fp_timing.x_res, lfp_data->fp_timing.y_res,
_PIXEL_CLOCK(timing_data));
@@ -336,15 +350,11 @@ static void dump_lvds_data(void)
(unsigned long)lfp_data->fp_timing.pp_cycle_reg_val);
printf("\t\t PFIT: 0x%08lx\n",
(unsigned long)lfp_data->fp_timing.pfit_reg_val);
- printf("\t\ttimings: %d %d %d %d %d %d %d %d\n",
- _H_ACTIVE(timing_data),
- _H_BLANK(timing_data),
- _H_SYNC_OFF(timing_data),
- _H_SYNC_WIDTH(timing_data),
- _V_ACTIVE(timing_data),
- _V_BLANK(timing_data),
- _V_SYNC_OFF(timing_data),
- _V_SYNC_WIDTH(timing_data));
+ printf("\t\ttimings: %d %d %d %d %d %d %d %d %.2f (%s)\n",
+ hdisplay, hsyncstart, hsyncend, htotal,
+ vdisplay, vsyncstart, vsyncend, vtotal, clock,
+ (hsyncend > htotal || vsyncend > vtotal) ?
+ "BAD!" : "good");
}
free(block);
}
diff --git a/src/i830.h b/src/i830.h
index dd5555d..b726dd6 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -72,9 +72,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "dri.h"
#include "GL/glxint.h"
#include "i830_dri.h"
-#ifdef DAMAGE
-#include "damage.h"
-#endif
#include "drmmode_display.h"
#endif
#include "intel_bufmgr.h"
@@ -95,6 +92,7 @@ void i830_uxa_block_handler (ScreenPtr pScreen);
#if defined(I830_USE_UXA) || defined(I830_USE_EXA)
dri_bo *i830_get_pixmap_bo (PixmapPtr pixmap);
+void i830_set_pixmap_bo(PixmapPtr pixmap, dri_bo *bo);
#endif
#ifdef I830_USE_XAA
@@ -141,6 +139,8 @@ enum tile_format {
TILE_YMAJOR
};
+#define PITCH_NONE 0
+
/** Record of a linear allocation in the aperture. */
typedef struct _i830_memory i830_memory;
struct _i830_memory {
@@ -265,6 +265,8 @@ typedef struct _I830CrtcPrivateRec {
int dpms_mode;
+ int x, y;
+
/* Lookup table values to be set when the CRTC is enabled */
uint8_t lut_r[256], lut_g[256], lut_b[256];
@@ -437,6 +439,10 @@ typedef struct _I830Rec {
/** Number of bytes to be emitted in the current BEGIN_BATCH. */
uint32_t batch_emitting;
dri_bo *batch_bo;
+ /** Whether we're in a section of code that can't tolerate flushing */
+ Bool in_batch_atomic;
+ /** Ending batch_used that was verified by i830_start_batch_atomic() */
+ int batch_atomic_limit;
#ifdef I830_XV
/* For Xvideo */
@@ -452,13 +458,10 @@ typedef struct _I830Rec {
void (*PointerMoved)(int, int, int);
CreateScreenResourcesProcPtr CreateScreenResources;
- i830_memory *logical_context;
-
i830_memory *power_context;
#ifdef XF86DRI
i830_memory *back_buffer;
- i830_memory *third_buffer;
i830_memory *depth_buffer;
i830_memory *textures; /**< Compatibility texture memory */
i830_memory *memory_manager; /**< DRI memory manager aperture */
@@ -468,18 +471,14 @@ typedef struct _I830Rec {
int drmMinor;
Bool allocate_classic_textures;
+ Bool can_resize;
+
Bool want_vblank_interrupts;
-#ifdef DAMAGE
- DamagePtr pDamage;
- RegionRec driRegion;
-#endif
#endif
Bool need_mi_flush;
Bool NeedRingBufferLow;
- Bool allowPageFlip;
- Bool TripleBuffer;
[...2321 lines suppressed...]
+++ b/src/i915_render.c
@@ -315,39 +315,69 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
{
ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
- uint32_t dst_format, dst_pitch;
- uint32_t blendctl;
- int out_reg = FS_OC;
- FS_LOCALS(20);
- Bool is_affine_src, is_affine_mask;
- Bool is_nearest = FALSE;
i830_exa_check_pitch_3d(pSrc);
if (pMask)
i830_exa_check_pitch_3d(pMask);
i830_exa_check_pitch_3d(pDst);
- IntelEmitInvarientState(pScrn);
- *pI830->last_3d = LAST_3D_RENDER;
-
- if (!i915_get_dest_format(pDstPicture, &dst_format))
+ if (!i915_get_dest_format(pDstPicture,
+ &pI830->i915_render_state.dst_format))
return FALSE;
- dst_pitch = intel_get_pixmap_pitch(pDst);
+ pI830->i915_render_state.is_nearest = FALSE;
if (!i915_texture_setup(pSrcPicture, pSrc, 0))
I830FALLBACK("fail to setup src texture\n");
if (pSrcPicture->filter == PictFilterNearest)
- is_nearest = TRUE;
+ pI830->i915_render_state.is_nearest = TRUE;
if (pMask != NULL) {
if (!i915_texture_setup(pMaskPicture, pMask, 1))
I830FALLBACK("fail to setup mask texture\n");
if (pMaskPicture->filter == PictFilterNearest)
- is_nearest = TRUE;
+ pI830->i915_render_state.is_nearest = TRUE;
} else {
pI830->transform[1] = NULL;
pI830->scale_units[1][0] = -1;
pI830->scale_units[1][1] = -1;
}
+
+ pI830->i915_render_state.op = op;
+ pI830->i915_render_state.pSrcPicture = pSrcPicture;
+ pI830->i915_render_state.pMaskPicture = pMaskPicture;
+ pI830->i915_render_state.pDstPicture = pDstPicture;
+ pI830->i915_render_state.pSrc = pSrc;
+ pI830->i915_render_state.pMask = pMask;
+ pI830->i915_render_state.pDst = pDst;
+ pI830->i915_render_state.needs_emit = TRUE;
+
+ return TRUE;
+}
+
+static void
+i915_emit_composite_setup(ScrnInfoPtr pScrn)
+{
+ I830Ptr pI830 = I830PTR(pScrn);
+ int op = pI830->i915_render_state.op;
+ PicturePtr pSrcPicture = pI830->i915_render_state.pSrcPicture;
+ PicturePtr pMaskPicture = pI830->i915_render_state.pMaskPicture;
+ PicturePtr pDstPicture = pI830->i915_render_state.pDstPicture;
+ PixmapPtr pSrc = pI830->i915_render_state.pSrc;
+ PixmapPtr pMask = pI830->i915_render_state.pMask;
+ PixmapPtr pDst = pI830->i915_render_state.pDst;
+ uint32_t dst_format = pI830->i915_render_state.dst_format, dst_pitch;
+ uint32_t blendctl;
+ int out_reg = FS_OC;
+ FS_LOCALS(20);
+ Bool is_affine_src, is_affine_mask;
+ Bool is_nearest = pI830->i915_render_state.is_nearest;
+
+ pI830->i915_render_state.needs_emit = FALSE;
+
+ IntelEmitInvarientState(pScrn);
+ *pI830->last_3d = LAST_3D_RENDER;
+
+ dst_pitch = intel_get_pixmap_pitch(pDst);
+
is_affine_src = i830_transform_is_affine (pI830->transform[0]);
is_affine_mask = i830_transform_is_affine (pI830->transform[1]);
@@ -503,6 +533,29 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
i915_fs_mov(FS_OC, i915_fs_operand(out_reg, W, W, W, W));
FS_END();
+}
- return TRUE;
+void
+i915_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
+ int dstX, int dstY, int w, int h)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+
+ intel_batch_start_atomic(pScrn, 150);
+
+ if (pI830->i915_render_state.needs_emit)
+ i915_emit_composite_setup(pScrn);
+
+ i830_composite(pDst, srcX, srcY, maskX, maskY, dstX, dstY, w, h);
+
+ intel_batch_end_atomic(pScrn);
+}
+
+void
+i915_batch_flush_notify(ScrnInfoPtr pScrn)
+{
+ I830Ptr pI830 = I830PTR(pScrn);
+
+ pI830->i915_render_state.needs_emit = TRUE;
}
diff --git a/src/i915_video.c b/src/i915_video.c
index 7761a45..b903b5e 100644
--- a/src/i915_video.c
+++ b/src/i915_video.c
@@ -49,8 +49,9 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
{
I830Ptr pI830 = I830PTR(pScrn);
uint32_t format, ms3, s5;
- BoxPtr pbox;
- int nbox, dxo, dyo, pix_xoff, pix_yoff;
+ BoxPtr pbox = REGION_RECTS(dstRegion);
+ int nbox = REGION_NUM_RECTS(dstRegion);
+ int dxo, dyo, pix_xoff, pix_yoff;
Bool planar;
#if 0
@@ -72,6 +73,8 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
return;
}
+ intel_batch_start_atomic(pScrn, 200 + 20 * nbox);
+
IntelEmitInvarientState(pScrn);
*pI830->last_3d = LAST_3D_VIDEO;
@@ -362,8 +365,6 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
dxo = dstRegion->extents.x1;
dyo = dstRegion->extents.y1;
- pbox = REGION_RECTS(dstRegion);
- nbox = REGION_NUM_RECTS(dstRegion);
while (nbox--)
{
int box_x1 = pbox->x1;
@@ -412,6 +413,8 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
ADVANCE_BATCH();
}
+ intel_batch_end_atomic(pScrn);
+
i830MarkSync(pScrn);
}
diff --git a/src/i965_hwmc.c b/src/i965_hwmc.c
index 1c293d1..99e86f5 100644
--- a/src/i965_hwmc.c
+++ b/src/i965_hwmc.c
@@ -49,7 +49,7 @@ static int alloc_drm_memory_tiled(ScrnInfoPtr pScrn,
char *name, size_t size, unsigned long pitch, unsigned long alignment)
{
I830Ptr pI830 = I830PTR(pScrn);
- if ((mem->buffer = i830_allocate_memory_tiled(pScrn,
+ if ((mem->buffer = i830_allocate_memory(pScrn,
name, size, pitch,
GTT_PAGE_SIZE, ALIGN_BOTH_ENDS, TILE_XMAJOR)) == NULL) {
ErrorF("Fail to alloc \n");
@@ -75,8 +75,8 @@ static int alloc_drm_memory(ScrnInfoPtr pScrn,
{
I830Ptr pI830 = I830PTR(pScrn);
if ((mem->buffer = i830_allocate_memory(pScrn,
- name, size,
- GTT_PAGE_SIZE, ALIGN_BOTH_ENDS)) == NULL) {
+ name, size, PITCH_NONE, GTT_PAGE_SIZE,
+ ALIGN_BOTH_ENDS, TILE_NONE)) == NULL) {
ErrorF("Fail to alloc \n");
return BadAlloc;
}
diff --git a/src/xvmc/intel_xvmc.c b/src/xvmc/intel_xvmc.c
index dbde22f..4b73caa 100644
--- a/src/xvmc/intel_xvmc.c
+++ b/src/xvmc/intel_xvmc.c
@@ -757,13 +757,6 @@ _X_EXPORT Status XvMCPutSurface(Display *display,XvMCSurface *surface,
}
intel_surf->last_draw = draw;
/* fill intel_surf->data */
- if (0)
- {
- drmVBlank vbl;
- vbl.request.type = DRM_VBLANK_RELATIVE;
- vbl.request.sequence = 1;
- drmWaitVBlank(xvmc_driver->fd, &vbl);
- }
ret = (xvmc_driver->put_surface)(display, surface, draw, srcx, srcy,
srcw, srch, destx, desty, destw, desth, flags, &intel_surf->data);
if (ret) {
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