rpms/kernel/devel drm-nouveau.patch, 1.40, 1.41 kernel.spec, 1.1677, 1.1678

Ben Skeggs bskeggs at fedoraproject.org
Fri Jul 31 01:15:46 UTC 2009


Author: bskeggs

Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv6021

Modified Files:
	drm-nouveau.patch kernel.spec 
Log Message:
* Fri Jul 31 2009 Ben Skeggs <bskeggs at redhat.com>
- nouveau: build against 2.6.31-rc4-git6, fix script parsing on some G8x chips



drm-nouveau.patch:
 drivers/gpu/drm/Kconfig                     |   30 
 drivers/gpu/drm/Makefile                    |    1 
 drivers/gpu/drm/drm_bufs.c                  |   28 
 drivers/gpu/drm/nouveau/Makefile            |   27 
 drivers/gpu/drm/nouveau/nouveau_backlight.c |  155 
 drivers/gpu/drm/nouveau/nouveau_bios.c      | 5052 ++++++
 drivers/gpu/drm/nouveau/nouveau_bios.h      |  226 
 drivers/gpu/drm/nouveau/nouveau_bo.c        |  567 
 drivers/gpu/drm/nouveau/nouveau_calc.c      |  622 
 drivers/gpu/drm/nouveau/nouveau_connector.h |   55 
 drivers/gpu/drm/nouveau/nouveau_crtc.h      |   90 
 drivers/gpu/drm/nouveau/nouveau_display.c   |  115 
 drivers/gpu/drm/nouveau/nouveau_dma.c       |  143 
 drivers/gpu/drm/nouveau/nouveau_dma.h       |  144 
 drivers/gpu/drm/nouveau/nouveau_drv.c       |  363 
 drivers/gpu/drm/nouveau/nouveau_drv.h       | 1147 +
 drivers/gpu/drm/nouveau/nouveau_encoder.h   |   51 
 drivers/gpu/drm/nouveau/nouveau_fb.h        |   43 
 drivers/gpu/drm/nouveau/nouveau_fbcon.c     | 1019 +
 drivers/gpu/drm/nouveau/nouveau_fbcon.h     |   49 
 drivers/gpu/drm/nouveau/nouveau_fence.c     |  261 
 drivers/gpu/drm/nouveau/nouveau_fifo.c      |  681 
 drivers/gpu/drm/nouveau/nouveau_gem.c       |  751 
 drivers/gpu/drm/nouveau/nouveau_hw.c        | 1019 +
 drivers/gpu/drm/nouveau/nouveau_hw.h        |  431 
 drivers/gpu/drm/nouveau/nouveau_i2c.c       |  274 
 drivers/gpu/drm/nouveau/nouveau_i2c.h       |   46 
 drivers/gpu/drm/nouveau/nouveau_ioc32.c     |   72 
 drivers/gpu/drm/nouveau/nouveau_irq.c       |  674 
 drivers/gpu/drm/nouveau/nouveau_mem.c       |  557 
 drivers/gpu/drm/nouveau/nouveau_notifier.c  |  192 
 drivers/gpu/drm/nouveau/nouveau_object.c    | 1275 +
 drivers/gpu/drm/nouveau/nouveau_reg.h       |  834 +
 drivers/gpu/drm/nouveau/nouveau_sgdma.c     |  331 
 drivers/gpu/drm/nouveau/nouveau_state.c     |  833 +
 drivers/gpu/drm/nouveau/nouveau_swmthd.h    |   33 
 drivers/gpu/drm/nouveau/nouveau_ttm.c       |  116 
 drivers/gpu/drm/nouveau/nv04_crtc.c         | 1135 +
 drivers/gpu/drm/nouveau/nv04_cursor.c       |   70 
 drivers/gpu/drm/nouveau/nv04_display.c      |  250 
 drivers/gpu/drm/nouveau/nv04_fb.c           |   21 
 drivers/gpu/drm/nouveau/nv04_fbcon.c        |  291 
 drivers/gpu/drm/nouveau/nv04_fifo.c         |  146 
 drivers/gpu/drm/nouveau/nv04_graph.c        |  586 
 drivers/gpu/drm/nouveau/nv04_instmem.c      |  192 
 drivers/gpu/drm/nouveau/nv04_mc.c           |   20 
 drivers/gpu/drm/nouveau/nv04_output.c       | 1193 +
 drivers/gpu/drm/nouveau/nv04_timer.c        |   51 
 drivers/gpu/drm/nouveau/nv10_fb.c           |   24 
 drivers/gpu/drm/nouveau/nv10_fifo.c         |  177 
 drivers/gpu/drm/nouveau/nv10_graph.c        |  945 +
 drivers/gpu/drm/nouveau/nv20_graph.c        |  958 +
 drivers/gpu/drm/nouveau/nv40_fb.c           |   62 
 drivers/gpu/drm/nouveau/nv40_fifo.c         |  222 
 drivers/gpu/drm/nouveau/nv40_graph.c        | 2200 ++
 drivers/gpu/drm/nouveau/nv40_mc.c           |   38 
 drivers/gpu/drm/nouveau/nv50_connector.c    |  495 
 drivers/gpu/drm/nouveau/nv50_crtc.c         |  812 +
 drivers/gpu/drm/nouveau/nv50_cursor.c       |  153 
 drivers/gpu/drm/nouveau/nv50_dac.c          |  284 
 drivers/gpu/drm/nouveau/nv50_display.c      |  844 +
 drivers/gpu/drm/nouveau/nv50_display.h      |   46 
 drivers/gpu/drm/nouveau/nv50_evo.h          |  113 
 drivers/gpu/drm/nouveau/nv50_fbcon.c        |  256 
 drivers/gpu/drm/nouveau/nv50_fifo.c         |  475 
 drivers/gpu/drm/nouveau/nv50_graph.c        |  432 
 drivers/gpu/drm/nouveau/nv50_grctx.h        |22284 ++++++++++++++++++++++++++++
 drivers/gpu/drm/nouveau/nv50_instmem.c      |  499 
 drivers/gpu/drm/nouveau/nv50_mc.c           |   40 
 drivers/gpu/drm/nouveau/nv50_sor.c          |  268 
 drivers/gpu/drm/nouveau/nvreg.h             |  503 
 drivers/gpu/drm/ttm/ttm_bo.c                |    4 
 include/drm/Kbuild                          |    1 
 include/drm/drmP.h                          |    2 
 include/drm/nouveau_drm.h                   |  214 
 75 files changed, 54592 insertions(+), 21 deletions(-)

Index: drm-nouveau.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-nouveau.patch,v
retrieving revision 1.40
retrieving revision 1.41
diff -u -p -r1.40 -r1.41
--- drm-nouveau.patch	30 Jul 2009 08:41:40 -0000	1.40
+++ drm-nouveau.patch	31 Jul 2009 01:15:45 -0000	1.41
@@ -138,10 +138,10 @@ index 0000000..67a9582
 +obj-$(CONFIG_DRM_NOUVEAU)+= nouveau.o
 diff --git a/drivers/gpu/drm/nouveau/nouveau_backlight.c b/drivers/gpu/drm/nouveau/nouveau_backlight.c
 new file mode 100644
-index 0000000..d0f3bc9
+index 0000000..20564f8
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_backlight.c
-@@ -0,0 +1,156 @@
+@@ -0,0 +1,155 @@
 +/*
 + * Copyright (C) 2009 Red Hat <mjg at redhat.com>
 + *
@@ -278,7 +278,6 @@ index 0000000..d0f3bc9
 +
 +	switch (dev_priv->card_type) {
 +	case NV_40:
-+	case NV_44:
 +		return nouveau_nv40_backlight_init(dev);
 +	case NV_50:
 +		return nouveau_nv50_backlight_init(dev);
@@ -300,7 +299,7 @@ index 0000000..d0f3bc9
 +}
 diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
 new file mode 100644
-index 0000000..70f6947
+index 0000000..668008b
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
 @@ -0,0 +1,5052 @@
@@ -2773,7 +2772,7 @@ index 0000000..70f6947
 +		val <<= (0x100 - bios->data[offset + 5]);
 +	val &= bios->data[offset + 6];
 +
-+	val   = bios->data[xlatptr + val];
++	val   = bios->data[ROM16(bios->data[xlatptr]) + val];
 +	val <<= bios->data[offset + 16];
 +
 +	if (!iexec->execute)
@@ -7368,10 +7367,10 @@ index 0000000..f15873f
 +#endif
 diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c
 new file mode 100644
-index 0000000..fec1b29
+index 0000000..c9b169f
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_drv.c
-@@ -0,0 +1,353 @@
+@@ -0,0 +1,363 @@
 +/*
 + * Copyright 2005 Stephane Marchesin.
 + * All Rights Reserved.
@@ -7529,15 +7528,14 @@ index 0000000..fec1b29
 +	ret = nouveau_gpuobj_suspend(dev);
 +	if (ret) {
 +		NV_ERROR(dev, "... failed: %d\n", ret);
-+		return ret;
++		goto out_abort;
 +	}
 +
-+	if (engine->instmem.suspend) {
-+		ret = engine->instmem.suspend(dev);
-+		if (ret) {
-+			NV_ERROR(dev, "... failed: %d\n", ret);
-+			return ret;
-+		}
++	ret = engine->instmem.suspend(dev);
++	if (ret) {
++		NV_ERROR(dev, "... failed: %d\n", ret);
++		nouveau_gpuobj_suspend_cleanup(dev);
++		goto out_abort;
 +	}
 +
 +	NV_INFO(dev, "And we're gone!\n");
@@ -7552,6 +7550,18 @@ index 0000000..fec1b29
 +	release_console_sem();
 +	dev_priv->fbdev_info->flags = fbdev_flags;
 +	return 0;
++
++out_abort:
++	NV_INFO(dev, "Re-enabling acceleration..\n");
++	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH,
++		 nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUSH) | 1);
++	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 0x00000001);
++	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 0x00000001);
++	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL1, 0x00000001);
++	nv_wr32(dev, NV03_PFIFO_CACHES, 1);
++
++	engine->graph.fifo_access(dev, true);
++	return ret;
 +}
 +
 +static int
@@ -7591,8 +7601,7 @@ index 0000000..fec1b29
 +	}
 +
 +	NV_INFO(dev, "Reinitialising engines...\n");
-+	if (engine->instmem.resume)
-+		engine->instmem.resume(dev);
++	engine->instmem.resume(dev);
 +	engine->mc.init(dev);
 +	engine->timer.init(dev);
 +	engine->fb.init(dev);
@@ -7727,10 +7736,10 @@ index 0000000..fec1b29
 +MODULE_LICENSE("GPL and additional rights");
 diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
 new file mode 100644
-index 0000000..ed9b4df
+index 0000000..9f6dc8d
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
-@@ -0,0 +1,1145 @@
+@@ -0,0 +1,1147 @@
 +/*
 + * Copyright 2005 Stephane Marchesin.
 + * All Rights Reserved.
@@ -8175,7 +8184,6 @@ index 0000000..ed9b4df
 +	NV_20      = 20,
 +	NV_30      = 30,
 +	NV_40      = 40,
-+	NV_44      = 44,
 +	NV_50      = 50,
 +};
 +
@@ -8403,6 +8411,7 @@ index 0000000..ed9b4df
 +extern void nouveau_gpuobj_takedown(struct drm_device *);
 +extern void nouveau_gpuobj_late_takedown(struct drm_device *);
 +extern int  nouveau_gpuobj_suspend(struct drm_device *dev);
++extern void nouveau_gpuobj_suspend_cleanup(struct drm_device *dev);
 +extern void nouveau_gpuobj_resume(struct drm_device *dev);
 +extern int nouveau_gpuobj_channel_init(struct nouveau_channel *,
 +				       uint32_t vram_h, uint32_t tt_h);
@@ -8591,6 +8600,8 @@ index 0000000..ed9b4df
 +/* nv04_instmem.c */
 +extern int  nv04_instmem_init(struct drm_device *);
 +extern void nv04_instmem_takedown(struct drm_device *);
++extern int  nv04_instmem_suspend(struct drm_device *);
++extern void nv04_instmem_resume(struct drm_device *);
 +extern int  nv04_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
 +				  uint32_t *size);
 +extern void nv04_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
@@ -10331,10 +10342,10 @@ index 0000000..32b4bb9
 +
 diff --git a/drivers/gpu/drm/nouveau/nouveau_fifo.c b/drivers/gpu/drm/nouveau/nouveau_fifo.c
 new file mode 100644
-index 0000000..69ac2f6
+index 0000000..44a8467
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_fifo.c
-@@ -0,0 +1,668 @@
+@@ -0,0 +1,681 @@
 +/*
 + * Copyright 2005-2006 Stephane Marchesin
 + * All Rights Reserved.
@@ -10408,12 +10419,25 @@ index 0000000..69ac2f6
 +			break;
 +		}
 +
-+		nv_wr32(dev, NV40_PFIFO_RAMFC, 0x30002);
-+		break;
-+	case NV_44:
-+		nv_wr32(dev, NV40_PFIFO_RAMFC,
-+			((nouveau_mem_fb_amount(dev) - 512 * 1024 +
-+			  dev_priv->ramfc_offset) >> 16) | (2 << 16));
++		switch (dev_priv->chipset) {
++		case 0x40:
++		case 0x41:
++		case 0x42:
++		case 0x43:
++		case 0x45:
++		case 0x47:
++		case 0x48:
++		case 0x49:
++		case 0x4b:
++			nv_wr32(dev, NV40_PFIFO_RAMFC, 0x30002);
++			break;
++		default:
++			nv_wr32(dev, 0x2230, 0);
++			nv_wr32(dev, NV40_PFIFO_RAMFC,
++				((nouveau_mem_fb_amount(dev) - 512 * 1024 +
++				  dev_priv->ramfc_offset) >> 16) | (2 << 16));
++			break;
++		}
 +		break;
 +	case NV_30:
 +	case NV_20:
@@ -14314,7 +14338,7 @@ index 0000000..bad3712
 +}
 diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
 new file mode 100644
-index 0000000..3a3d384
+index 0000000..85f3597
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
 @@ -0,0 +1,557 @@
@@ -14713,7 +14737,6 @@ index 0000000..3a3d384
 +		case NV_20:
 +		case NV_30:
 +		case NV_40:
-+		case NV_44:
 +		case NV_50:
 +		default:
 +			if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2)) {
@@ -14817,7 +14840,8 @@ index 0000000..3a3d384
 +
 +	ret = ttm_bo_device_init(&dev_priv->ttm.bdev,
 +				 dev_priv->ttm.mem_global_ref.object,
-+				 &nouveau_bo_driver, DRM_FILE_PAGE_OFFSET);
++				 &nouveau_bo_driver, DRM_FILE_PAGE_OFFSET,
++				 dev_priv->card_type < NV_50);
 +	if (ret) {
 +		NV_ERROR(dev, "Error initialising bo driver: %d\n", ret);
 +		return ret;
@@ -15075,10 +15099,10 @@ index 0000000..afe0210
 +}
 diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c
 new file mode 100644
-index 0000000..9ba67df
+index 0000000..f5054d1
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_object.c
-@@ -0,0 +1,1258 @@
+@@ -0,0 +1,1275 @@
 +/*
 + * Copyright (C) 2006 Ben Skeggs.
 + *
@@ -16207,8 +16231,7 @@ index 0000000..9ba67df
 +	int i;
 +
 +	if (dev_priv->card_type < NV_50) {
-+		dev_priv->susres.ramin_copy = kmalloc(dev_priv->ramin_rsvd_vram,
-+						      GFP_KERNEL);
++		dev_priv->susres.ramin_copy = vmalloc(dev_priv->ramin_rsvd_vram);
 +		if (!dev_priv->susres.ramin_copy)
 +			return -ENOMEM;
 +
@@ -16221,8 +16244,7 @@ index 0000000..9ba67df
 +		if (!gpuobj->im_backing || (gpuobj->flags & NVOBJ_FLAG_FAKE))
 +			continue;
 +
-+		gpuobj->im_backing_suspend = kmalloc(gpuobj->im_pramin->size,
-+						     GFP_KERNEL);
++		gpuobj->im_backing_suspend = vmalloc(gpuobj->im_pramin->size);
 +		if (!gpuobj->im_backing_suspend) {
 +			nouveau_gpuobj_resume(dev);
 +			return -ENOMEM;
@@ -16238,6 +16260,27 @@ index 0000000..9ba67df
 +}
 +
 +void
++nouveau_gpuobj_suspend_cleanup(struct drm_device *dev)
++{
++	struct drm_nouveau_private *dev_priv = dev->dev_private;
++	struct nouveau_gpuobj *gpuobj;
++
++	if (dev_priv->card_type < NV_50) {
++		vfree(dev_priv->susres.ramin_copy);
++		dev_priv->susres.ramin_copy = NULL;
++		return;
++	}
++
++	list_for_each_entry(gpuobj, &dev_priv->gpuobj_list, list) {
++		if (!gpuobj->im_backing_suspend)
++			continue;
++
++		vfree(gpuobj->im_backing_suspend);
++		gpuobj->im_backing_suspend = NULL;
++	}
++}
++
++void
 +nouveau_gpuobj_resume(struct drm_device *dev)
 +{
 +	struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -16247,8 +16290,7 @@ index 0000000..9ba67df
 +	if (dev_priv->card_type < NV_50) {
 +		for (i = 0; i < dev_priv->ramin_rsvd_vram; i += 4)
 +			nv_wi32(dev, i, dev_priv->susres.ramin_copy[i/4]);
-+		kfree(dev_priv->susres.ramin_copy);
-+		dev_priv->susres.ramin_copy = NULL;
++		nouveau_gpuobj_suspend_cleanup(dev);
 +		return;
 +	}
 +
@@ -16260,10 +16302,9 @@ index 0000000..9ba67df
 +		for (i = 0; i < gpuobj->im_pramin->size / 4; i++)
 +			nv_wo32(dev, gpuobj, i, gpuobj->im_backing_suspend[i]);
 +		dev_priv->engine.instmem.finish_access(dev);
-+
-+		kfree(gpuobj->im_backing_suspend);
-+		gpuobj->im_backing_suspend = NULL;
 +	}
++
++	nouveau_gpuobj_suspend_cleanup(dev);
 +}
 +
 +int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data,
@@ -17516,10 +17557,10 @@ index 0000000..32a9452
 +}
 diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
 new file mode 100644
-index 0000000..a09ee5e
+index 0000000..f8f5bec
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_state.c
-@@ -0,0 +1,837 @@
+@@ -0,0 +1,833 @@
 +/*
 + * Copyright 2005 Stephane Marchesin
 + * Copyright 2008 Stuart Bennett
@@ -17611,6 +17652,8 @@ index 0000000..a09ee5e
 +	case 0x00:
 +		engine->instmem.init	= nv04_instmem_init;
 +		engine->instmem.takedown= nv04_instmem_takedown;
++		engine->instmem.suspend	= nv04_instmem_suspend;
++		engine->instmem.resume	= nv04_instmem_resume;
 +		engine->instmem.populate	= nv04_instmem_populate;
 +		engine->instmem.clear		= nv04_instmem_clear;
 +		engine->instmem.bind		= nv04_instmem_bind;
@@ -17644,6 +17687,8 @@ index 0000000..a09ee5e
 +	case 0x10:
 +		engine->instmem.init	= nv04_instmem_init;
 +		engine->instmem.takedown= nv04_instmem_takedown;
++		engine->instmem.suspend	= nv04_instmem_suspend;
++		engine->instmem.resume	= nv04_instmem_resume;
 +		engine->instmem.populate	= nv04_instmem_populate;
 +		engine->instmem.clear		= nv04_instmem_clear;
 +		engine->instmem.bind		= nv04_instmem_bind;
@@ -17677,6 +17722,8 @@ index 0000000..a09ee5e
 +	case 0x20:
 +		engine->instmem.init	= nv04_instmem_init;
 +		engine->instmem.takedown= nv04_instmem_takedown;
++		engine->instmem.suspend	= nv04_instmem_suspend;
++		engine->instmem.resume	= nv04_instmem_resume;
 +		engine->instmem.populate	= nv04_instmem_populate;
 +		engine->instmem.clear		= nv04_instmem_clear;
 +		engine->instmem.bind		= nv04_instmem_bind;
@@ -17710,6 +17757,8 @@ index 0000000..a09ee5e
 +	case 0x30:
 +		engine->instmem.init	= nv04_instmem_init;
 +		engine->instmem.takedown= nv04_instmem_takedown;
++		engine->instmem.suspend	= nv04_instmem_suspend;
++		engine->instmem.resume	= nv04_instmem_resume;
 +		engine->instmem.populate	= nv04_instmem_populate;
 +		engine->instmem.clear		= nv04_instmem_clear;
 +		engine->instmem.bind		= nv04_instmem_bind;
@@ -17744,6 +17793,8 @@ index 0000000..a09ee5e
 +	case 0x60:
 +		engine->instmem.init	= nv04_instmem_init;
 +		engine->instmem.takedown= nv04_instmem_takedown;
++		engine->instmem.suspend	= nv04_instmem_suspend;
++		engine->instmem.resume	= nv04_instmem_resume;
 +		engine->instmem.populate	= nv04_instmem_populate;
 +		engine->instmem.clear		= nv04_instmem_clear;
 +		engine->instmem.bind		= nv04_instmem_bind;
@@ -18033,9 +18084,6 @@ index 0000000..a09ee5e
 +#endif
 +}
 +
-+#define NV40_CHIPSET_MASK 0x00000baf
-+#define NV44_CHIPSET_MASK 0x00005450
-+
 +int nouveau_load(struct drm_device *dev, unsigned long flags)
 +{
 +	struct drm_nouveau_private *dev_priv;
@@ -18091,45 +18139,34 @@ index 0000000..a09ee5e
 +		architecture = 0x04;
 +	}
 +
-+	if (architecture >= 0x80) {
++	if (architecture >= 0x80)
 +		dev_priv->card_type = NV_50;
-+	} else if (architecture >= 0x60) {
-+		/* FIXME we need to figure out who's who for NV6x */
-+		dev_priv->card_type = NV_44;
-+	} else if (architecture >= 0x50) {
++	else if (architecture >= 0x60)
++		dev_priv->card_type = NV_40;
++	else if (architecture >= 0x50)
 +		dev_priv->card_type = NV_50;
-+	} else if (architecture >= 0x40) {
-+		uint8_t subarch = architecture & 0xf;
-+		/* Selection criteria borrowed from NV40EXA */
-+		if (NV40_CHIPSET_MASK & (1 << subarch)) {
-+			dev_priv->card_type = NV_40;
-+		} else if (NV44_CHIPSET_MASK & (1 << subarch)) {
-+			dev_priv->card_type = NV_44;
-+		} else {
-+			dev_priv->card_type = NV_UNKNOWN;
-+		}
-+	} else if (architecture >= 0x30) {
++	else if (architecture >= 0x40)
++		dev_priv->card_type = NV_40;
++	else if (architecture >= 0x30)
 +		dev_priv->card_type = NV_30;
-+	} else if (architecture >= 0x20) {
++	else if (architecture >= 0x20)
 +		dev_priv->card_type = NV_20;
-+	} else if (architecture >= 0x17) {
++	else if (architecture >= 0x17)
 +		dev_priv->card_type = NV_17;
-+	} else if (architecture >= 0x11) {
++	else if (architecture >= 0x11)
 +		dev_priv->card_type = NV_11;
-+	} else if (architecture >= 0x10) {
++	else if (architecture >= 0x10)
 +		dev_priv->card_type = NV_10;
-+	} else if (architecture >= 0x04) {
++	else if (architecture >= 0x04)
 +		dev_priv->card_type = NV_04;
-+	} else {
++	else
 +		dev_priv->card_type = NV_UNKNOWN;
-+	}
 +
 +	NV_INFO(dev, "Detected an NV%d generation card (0x%08x)\n",
-+						dev_priv->card_type, reg0);
++		dev_priv->card_type, reg0);
 +
-+	if (dev_priv->card_type == NV_UNKNOWN) {
++	if (dev_priv->card_type == NV_UNKNOWN)
 +		return -EINVAL;
-+	}
 +
 +	/* map larger RAMIN aperture on NV40 cards */
 +	dev_priv->ramin  = NULL;
@@ -21061,10 +21098,10 @@ index 0000000..6a0f4d3
 +
 diff --git a/drivers/gpu/drm/nouveau/nv04_instmem.c b/drivers/gpu/drm/nouveau/nv04_instmem.c
 new file mode 100644
-index 0000000..883e6dd
+index 0000000..74fde48
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nv04_instmem.c
-@@ -0,0 +1,182 @@
+@@ -0,0 +1,192 @@
 +#include "drmP.h"
 +#include "drm.h"
 +#include "nouveau_drv.h"
@@ -21139,7 +21176,6 @@ index 0000000..883e6dd
 +	switch(dev_priv->card_type)
 +	{
 +		case NV_40:
-+		case NV_44:
 +			dev_priv->ramfc_offset = 0x20000;
 +			dev_priv->ramfc_size   = engine->fifo.channels *
 +						 nouveau_fifo_ctx_size(dev);
@@ -21247,6 +21283,17 @@ index 0000000..883e6dd
 +{
 +}
 +
++int
++nv04_instmem_suspend(struct drm_device *dev)
++{
++	return 0;
++}
++
++void
++nv04_instmem_resume(struct drm_device *dev)
++{
++}
++
 diff --git a/drivers/gpu/drm/nouveau/nv04_mc.c b/drivers/gpu/drm/nouveau/nv04_mc.c
 new file mode 100644
 index 0000000..617ed1e
@@ -53465,7 +53512,7 @@ index 0000000..9abaa72
 +#endif
 diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c
 new file mode 100644
-index 0000000..6761e3a
+index 0000000..062d085
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nv50_instmem.c
 @@ -0,0 +1,499 @@
@@ -53788,7 +53835,7 @@ index 0000000..6761e3a
 +	struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
 +	int i;
 +
-+	ramin->im_backing_suspend = kmalloc(ramin->im_pramin->size, GFP_KERNEL);
++	ramin->im_backing_suspend = vmalloc(ramin->im_pramin->size);
 +	if (!ramin->im_backing_suspend)
 +		return -ENOMEM;
 +
@@ -53809,7 +53856,7 @@ index 0000000..6761e3a
 +	nv_wr32(dev, NV50_PUNK_BAR0_PRAMIN, (ramin->im_backing_start >> 16));
 +	for (i = 0; i < ramin->im_pramin->size; i += 4)
 +		BAR0_WI32(ramin, i, ramin->im_backing_suspend[i/4]);
-+	kfree(ramin->im_backing_suspend);
++	vfree(ramin->im_backing_suspend);
 +	ramin->im_backing_suspend = NULL;
 +
 +	/* Poke the relevant regs, and pray it works :) */
@@ -54798,10 +54845,10 @@ index 0000000..90623b0
 +
 +#endif
 diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
-index c1c407f..cbdfbd2 100644
+index 6538d42..ebc9532 100644
 --- a/drivers/gpu/drm/ttm/ttm_bo.c
 +++ b/drivers/gpu/drm/ttm/ttm_bo.c
-@@ -90,6 +90,7 @@ int ttm_bo_wait_unreserved(struct ttm_buffer_object *bo, bool interruptible)
+@@ -89,6 +89,7 @@ int ttm_bo_wait_unreserved(struct ttm_buffer_object *bo, bool interruptible)
  	}
  	return 0;
  }
@@ -54809,7 +54856,7 @@ index c1c407f..cbdfbd2 100644
  
  static void ttm_bo_add_to_lru(struct ttm_buffer_object *bo)
  {
-@@ -811,6 +812,7 @@ int ttm_bo_wait_cpu(struct ttm_buffer_object *bo, bool no_wait)
+@@ -843,6 +844,7 @@ int ttm_bo_wait_cpu(struct ttm_buffer_object *bo, bool no_wait)
  
  	return ret;
  }
@@ -54817,7 +54864,7 @@ index c1c407f..cbdfbd2 100644
  
  int ttm_bo_move_buffer(struct ttm_buffer_object *bo,
  		       uint32_t proposed_placement,
-@@ -1593,12 +1595,14 @@ int ttm_bo_synccpu_write_grab(struct ttm_buffer_object *bo, bool no_wait)
+@@ -1628,12 +1630,14 @@ int ttm_bo_synccpu_write_grab(struct ttm_buffer_object *bo, bool no_wait)
  	ttm_bo_unreserve(bo);
  	return ret;
  }


Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1677
retrieving revision 1.1678
diff -u -p -r1.1677 -r1.1678
--- kernel.spec	31 Jul 2009 01:00:04 -0000	1.1677
+++ kernel.spec	31 Jul 2009 01:15:46 -0000	1.1678
@@ -1935,6 +1935,9 @@ fi
 # and build.
 
 %changelog
+* Fri Jul 31 2009 Ben Skeggs <bskeggs at redhat.com>
+- nouveau: build against 2.6.31-rc4-git6, fix script parsing on some G8x chips
+
 * Thu Jul 30 2009 Chuck Ebbert <cebbert at redhat.com>
 - Linux 2.6.31-rc4-git6
   New config item: CONFIG_BATTERY_DS2782 is not set




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