rpms/kernel/devel drm-modesetting-radeon.patch, 1.61, 1.62 kernel.spec, 1.1386, 1.1387
Dave Airlie
airlied at fedoraproject.org
Thu Mar 5 07:26:22 UTC 2009
Author: airlied
Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv1345
Modified Files:
drm-modesetting-radeon.patch kernel.spec
Log Message:
* Thu Mar 05 2009 Dave Airlie <airlied at redhat.com>
- drm-radeon-modesetting.patch: add new relocation for Xv sync
drm-modesetting-radeon.patch:
Index: drm-modesetting-radeon.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-modesetting-radeon.patch,v
retrieving revision 1.61
retrieving revision 1.62
diff -u -r1.61 -r1.62
--- drm-modesetting-radeon.patch 3 Mar 2009 22:04:06 -0000 1.61
+++ drm-modesetting-radeon.patch 5 Mar 2009 07:26:21 -0000 1.62
@@ -1,3 +1,11 @@
+commit fef48d5013f761faec24ee1044282b6098318237
+Author: Dave Airlie <airlied at redhat.com>
+Date: Thu Mar 5 15:57:18 2009 +1000
+
+ radeon: add special relocation for WAIT_VLINE
+
+ This is half ways between a hack and really neat.
+
commit 530ebda60cb7270795b7edd72930ab2d0e4db102
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Mar 3 18:23:22 2009 +1000
@@ -14369,7 +14377,7 @@
+ drm_crtc_helper_add(&radeon_crtc->base, &atombios_helper_funcs);
+}
diff --git a/drivers/gpu/drm/radeon/r300_cmdbuf.c b/drivers/gpu/drm/radeon/r300_cmdbuf.c
-index 3efa633..c97d529 100644
+index 3efa633..54ecf36 100644
--- a/drivers/gpu/drm/radeon/r300_cmdbuf.c
+++ b/drivers/gpu/drm/radeon/r300_cmdbuf.c
@@ -35,6 +35,7 @@
@@ -14450,20 +14458,24 @@
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
ADD_RANGE(R500_VAP_INDEX_OFFSET, 1);
ADD_RANGE(R500_US_CONFIG, 2);
-@@ -258,7 +265,8 @@ void r300_init_reg_flags(struct drm_device *dev)
+@@ -258,7 +265,10 @@ void r300_init_reg_flags(struct drm_device *dev)
ADD_RANGE(R500_RS_INST_0, 16);
ADD_RANGE(R500_RB3D_COLOR_CLEAR_VALUE_AR, 2);
ADD_RANGE(R500_RB3D_CONSTANT_COLOR_AR, 2);
- ADD_RANGE(R500_ZB_FIFO_SIZE, 2);
+// ADD_RANGE(R500_ZB_FIFO_SIZE 2);
+ ADD_RANGE(R500_GA_US_VECTOR_INDEX, 2);
++
++ ADD_RANGE_MARK(AVIVO_D1MODE_VLINE_START_END, 1, MARK_CHECK_WAIT_VLINE);
} else {
ADD_RANGE(R300_PFS_CNTL_0, 3);
ADD_RANGE(R300_PFS_NODE_0, 4);
-@@ -271,9 +279,122 @@ void r300_init_reg_flags(struct drm_device *dev)
+@@ -270,10 +280,124 @@ void r300_init_reg_flags(struct drm_device *dev)
+ ADD_RANGE(R300_RS_INTERP_0, 8);
ADD_RANGE(R300_RS_ROUTE_0, 8);
- }
++ ADD_RANGE_MARK(RADEON_CRTC_GUI_TRIG_VLINE, 1, MARK_CHECK_WAIT_VLINE);
++ }
+
+ /* add 2d blit engine registers for DDX */
+ ADD_RANGE(RADEON_SRC_Y_X, 3); /* 1434, 1438, 143c,
@@ -14576,7 +14588,7 @@
+ ADD_RANGE_MARK(RADEON_PP_TXOFFSET_1, 1, MARK_CHECK_OFFSET);
+ ADD_RANGE_MARK(RADEON_PP_TXOFFSET_2, 1, MARK_CHECK_OFFSET);
+ }
-+ }
+ }
}
-static __inline__ int r300_check_range(unsigned reg, int count)
@@ -14584,7 +14596,7 @@
{
int i;
if (reg & ~0xffff)
-@@ -284,6 +405,13 @@ static __inline__ int r300_check_range(unsigned reg, int count)
+@@ -284,6 +408,13 @@ static __inline__ int r300_check_range(unsigned reg, int count)
return 0;
}
@@ -19946,10 +19958,10 @@
+}
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
new file mode 100644
-index 0000000..3084639
+index 0000000..823b82f
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
-@@ -0,0 +1,593 @@
+@@ -0,0 +1,667 @@
+/*
+ * Copyright 2008 Jerome Glisse.
+ * All Rights Reserved.
@@ -20142,6 +20154,71 @@
+ *offset = reloc[1];
+ return 0;
+}
++
++/* special case CRTC relocation for vline waits
++ * userspace doesn't know which CRTC it controls so we have a special sequence
++ * packet0 VLINE_START_END, value
++ * packet0 WAIT_UNTIL, crtc line | crtc_num
++ * packet0 NOP, crtc_id
++ * we relocate the vline register and the wait until crtc_num bit
++ */
++static int radeon_cs_relocate_crtc(struct drm_radeon_cs_parser *parser, uint32_t offset_dw)
++{
++ struct drm_device *dev = parser->dev;
++ struct drm_mode_object *obj;
++ struct drm_crtc *crtc;
++ struct radeon_crtc *radeon_crtc;
++ uint32_t hdr, reg, val, packet3_hdr;
++ int ret = 0;
++ int crtc_id;
++ struct drm_radeon_kernel_chunk *ib_chunk;
++
++ ib_chunk = &parser->chunks[parser->ib_index];
++
++ hdr = ib_chunk->kdata[offset_dw];
++ reg = (hdr & R300_CP_PACKET0_REG_MASK) << 2;
++ val = ib_chunk->kdata[offset_dw + 1];
++ packet3_hdr = ib_chunk->kdata[offset_dw + 4];
++
++ mutex_lock(&dev->mode_config.mutex);
++ obj = drm_mode_object_find(parser->dev, ib_chunk->kdata[offset_dw + 5], DRM_MODE_OBJECT_CRTC);
++ if (!obj) {
++ ret = -EINVAL;
++ goto out;
++ }
++ crtc = obj_to_crtc(obj);
++ radeon_crtc = to_radeon_crtc(crtc);
++
++ crtc_id = radeon_crtc->crtc_id;
++
++ /*
++ * need to edit both packets
++ */
++ /* vline start end - for crtc0 no work to do */
++ if (crtc_id == 1) {
++ switch (reg) {
++ case AVIVO_D1MODE_VLINE_START_END:
++ hdr &= R300_CP_PACKET0_REG_MASK;
++ hdr |= AVIVO_D2MODE_VLINE_START_END >> 2;
++ break;
++ case RADEON_CRTC_GUI_TRIG_VLINE:
++ hdr &= R300_CP_PACKET0_REG_MASK;
++ hdr |= RADEON_CRTC2_GUI_TRIG_VLINE >> 2;
++ break;
++ default:
++ DRM_ERROR("unknown CRTC relocation\n");
++ ret = -EINVAL;
++ goto out;
++ }
++ /* relocate the WAIT_UNTIL */
++ ib_chunk->kdata[offset_dw] = hdr;
++ ib_chunk->kdata[offset_dw + 3] |= RADEON_ENG_DISPLAY_SELECT_CRTC1;
++ }
++out:
++ mutex_unlock(&dev->mode_config.mutex);
++ return ret;
++}
++
+#define RELOC_SIZE 2
+#define RELOC_SIZE_NEW 0
+#define RADEON_2D_OFFSET_MASK 0x3fffff
@@ -20304,12 +20381,14 @@
+ return 0;
+}
+
-+int radeon_cs_packet0(struct drm_radeon_cs_parser *parser, uint32_t offset_dw)
++int radeon_cs_packet0(struct drm_radeon_cs_parser *parser, uint32_t *offset_dw_p)
+{
+ uint32_t hdr, num_dw, reg;
+ int count_dw = 1;
+ int ret;
+ bool one_reg;
++ uint32_t offset_dw = *offset_dw_p;
++ int incr = 2;
+
+ hdr = parser->chunks[parser->ib_index].kdata[offset_dw];
+ num_dw = ((hdr & RADEON_CP_PACKET_COUNT_MASK) >> 16) + 2;
@@ -20345,6 +20424,13 @@
+ /* okay it should be followed by a NOP */
+ } else if (flags == MARK_CHECK_SCISSOR) {
+ DRM_DEBUG("need to validate scissor %x %d\n", reg, flags);
++ } else if (flags == MARK_CHECK_WAIT_VLINE) {
++ ret = radeon_cs_relocate_crtc(parser, offset_dw);
++ if (ret) {
++ DRM_ERROR("failed to relocate packet\n");
++ return ret;
++ }
++ incr = 4;
+ } else {
+ DRM_ERROR("illegal register %x %d %d\n", reg, flags, offset_dw);
+ return -EINVAL;
@@ -20357,6 +20443,7 @@
+ count_dw++;
+ reg += 4;
+ }
++ *offset_dw_p += incr;
+ return 0;
+}
+
@@ -20378,8 +20465,7 @@
+
+ switch (hdr & RADEON_CP_PACKET_MASK) {
+ case RADEON_CP_PACKET0:
-+ ret = radeon_cs_packet0(parser, count_dw);
-+ num_dw += 2;
++ ret = radeon_cs_packet0(parser, &count_dw);
+ break;
+ case RADEON_CP_PACKET1:
+ case RADEON_CP_PACKET2:
@@ -21725,7 +21811,7 @@
}
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
-index 7091aaf..44acdd7 100644
+index 7091aaf..e2b94a4 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -34,6 +34,8 @@
@@ -22327,7 +22413,7 @@
} while (0)
#define RADEON_WAIT_UNTIL_3D_IDLE() do { \
-@@ -2036,4 +2203,158 @@ extern void radeon_commit_ring(drm_radeon_private_t *dev_priv);
+@@ -2036,4 +2203,159 @@ extern void radeon_commit_ring(drm_radeon_private_t *dev_priv);
write &= mask; \
} while (0)
@@ -22473,6 +22559,7 @@
+#define MARK_SAFE 1
+#define MARK_CHECK_OFFSET 2
+#define MARK_CHECK_SCISSOR 3
++#define MARK_CHECK_WAIT_VLINE 4 /* VLINE on a crtc relocation */
+
+struct _radeon_pkt_s {
+ int start;
@@ -29766,10 +29853,10 @@
+
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
new file mode 100644
-index 0000000..bb9ad4a
+index 0000000..9ccf839
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_reg.h
-@@ -0,0 +1,5335 @@
+@@ -0,0 +1,5337 @@
+/*
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
+ * VA Linux Systems Inc., Fremont, California.
@@ -33431,6 +33518,7 @@
+#define AVIVO_D1MODE_DATA_FORMAT 0x6528
+# define AVIVO_D1MODE_INTERLEAVE_EN (1 << 0)
+#define AVIVO_D1MODE_DESKTOP_HEIGHT 0x652C
++#define AVIVO_D1MODE_VLINE_START_END 0x6538
+#define AVIVO_D1MODE_VIEWPORT_START 0x6580
+#define AVIVO_D1MODE_VIEWPORT_SIZE 0x6584
+#define AVIVO_D1MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6588
@@ -33482,6 +33570,7 @@
+#define AVIVO_D2CUR_SIZE 0x6c10
+#define AVIVO_D2CUR_POSITION 0x6c14
+
++#define AVIVO_D2MODE_VLINE_START_END 0x6d38
+#define AVIVO_D2MODE_VIEWPORT_START 0x6d80
+#define AVIVO_D2MODE_VIEWPORT_SIZE 0x6d84
+#define AVIVO_D2MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6d88
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1386
retrieving revision 1.1387
diff -u -r1.1386 -r1.1387
--- kernel.spec 5 Mar 2009 05:52:06 -0000 1.1386
+++ kernel.spec 5 Mar 2009 07:26:22 -0000 1.1387
@@ -1796,6 +1796,9 @@
# and build.
%changelog
+* Thu Mar 05 2009 Dave Airlie <airlied at redhat.com>
+- drm-radeon-modesetting.patch: add new relocation for Xv sync
+
* Thu Mar 05 2009 Ben Skeggs <bskeggs at redhat.com>
- drm-nouveau.patch: fix some issues mainly seen on earlier chipsets
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