rpms/xorg-x11-drv-ati/F-11 radeon-modeset-fixes.patch, 1.2, 1.3 xorg-x11-drv-ati.spec, 1.185, 1.186 radeon-6.12.2-fix-rs690-clamp.patch, 1.3, NONE radeon-6.12.2-fix-xv-warning.patch, 1.1, NONE radeon-6.12.2-kms-gamma.patch, 1.2, NONE

Dave Airlie airlied at fedoraproject.org
Tue May 5 05:35:12 UTC 2009


Author: airlied

Update of /cvs/pkgs/rpms/xorg-x11-drv-ati/F-11
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv13444

Modified Files:
	xorg-x11-drv-ati.spec 
Added Files:
	radeon-modeset-fixes.patch 
Removed Files:
	radeon-6.12.2-fix-rs690-clamp.patch 
	radeon-6.12.2-fix-xv-warning.patch 
	radeon-6.12.2-kms-gamma.patch 
Log Message:
* Tue May 05 2009 Dave Airlie <airlied at redhat.com> 6.12.2-10
- radeon-modeset-fixes.patch: backport fixes from upstream for rs480 firefox gpu crash


radeon-modeset-fixes.patch:

Index: radeon-modeset-fixes.patch
===================================================================
RCS file: radeon-modeset-fixes.patch
diff -N radeon-modeset-fixes.patch
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ radeon-modeset-fixes.patch	5 May 2009 05:34:41 -0000	1.3
@@ -0,0 +1,250 @@
+diff --git a/src/drmmode_display.c b/src/drmmode_display.c
+index b368115..8e33a76 100644
+--- a/src/drmmode_display.c
++++ b/src/drmmode_display.c
+@@ -458,7 +458,11 @@ static void
+ drmmode_crtc_gamma_set(xf86CrtcPtr crtc, uint16_t *red, uint16_t *green,
+                       uint16_t *blue, int size)
+ {
+-	return;
++	drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
++	drmmode_ptr drmmode = drmmode_crtc->drmmode;
++
++	drmModeCrtcSetGamma(drmmode->fd, drmmode_crtc->mode_crtc->crtc_id,
++			    size, red, green, blue);
+ }
+ 
+ static const xf86CrtcFuncsRec drmmode_crtc_funcs = {
+@@ -954,8 +958,6 @@ static void drmmode_load_palette(ScrnInfoPtr pScrn, int numColors,
+     int index, j, i;
+     int c;
+ 
+-
+-
+     for (c = 0; c < xf86_config->num_crtc; c++) {
+         xf86CrtcPtr crtc = xf86_config->crtc[c];
+ 	drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
+@@ -966,8 +968,7 @@ static void drmmode_load_palette(ScrnInfoPtr pScrn, int numColors,
+             lut_b[i] = drmmode_crtc->lut_b[i] << 6;
+         }
+ 
+-#if 0 //TODO
+-        switch (info->CurrentLayout.depth) {
++        switch(pScrn->depth) {
+         case 15:
+             for (i = 0; i < numColors; i++) {
+                 index = indices[i];
+@@ -1003,7 +1004,6 @@ static void drmmode_load_palette(ScrnInfoPtr pScrn, int numColors,
+               }
+               break;
+           }
+-#endif
+ 
+     /* Make the change through RandR */
+ #ifdef RANDR_12_INTERFACE
+diff --git a/src/radeon_accel.c b/src/radeon_accel.c
+index 9d02ac8..5577f84 100644
+--- a/src/radeon_accel.c
++++ b/src/radeon_accel.c
+@@ -491,7 +491,7 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
+ 		       "num quad-pipes is %d\n", info->accel_state->num_gb_pipes);
+ 
+ 	if (IS_R300_3D || IS_R500_3D) {
+-	    uint32_t gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
++	    uint32_t gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16);
+ 	    
+ 	    switch(info->accel_state->num_gb_pipes) {
+ 	    case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
+diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
+index 6c22339..9e23463 100644
+--- a/src/radeon_commonfuncs.c
++++ b/src/radeon_commonfuncs.c
+@@ -72,7 +72,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
+ 	    FINISH_ACCEL();
+ 	}
+ 
+-	gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
++	gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16);
+ 
+ 	switch(info->accel_state->num_gb_pipes) {
+ 	case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
+@@ -110,21 +110,21 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
+ 	OUT_ACCEL_REG(R300_GB_AA_CONFIG, 0);
+ 	OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
+ 	OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
+-	OUT_ACCEL_REG(R300_GB_MSPOS0, ((8 << R300_MS_X0_SHIFT) |
+-				       (8 << R300_MS_Y0_SHIFT) |
+-				       (8 << R300_MS_X1_SHIFT) |
+-				       (8 << R300_MS_Y1_SHIFT) |
+-				       (8 << R300_MS_X2_SHIFT) |
+-				       (8 << R300_MS_Y2_SHIFT) |
+-				       (8 << R300_MSBD0_Y_SHIFT) |
+-				       (7 << R300_MSBD0_X_SHIFT)));
+-	OUT_ACCEL_REG(R300_GB_MSPOS1, ((8 << R300_MS_X3_SHIFT) |
+-				       (8 << R300_MS_Y3_SHIFT) |
+-				       (8 << R300_MS_X4_SHIFT) |
+-				       (8 << R300_MS_Y4_SHIFT) |
+-				       (8 << R300_MS_X5_SHIFT) |
+-				       (8 << R300_MS_Y5_SHIFT) |
+-				       (8 << R300_MSBD1_SHIFT)));
++	OUT_ACCEL_REG(R300_GB_MSPOS0, ((6 << R300_MS_X0_SHIFT) |
++				       (6 << R300_MS_Y0_SHIFT) |
++				       (6 << R300_MS_X1_SHIFT) |
++				       (6 << R300_MS_Y1_SHIFT) |
++				       (6 << R300_MS_X2_SHIFT) |
++				       (6 << R300_MS_Y2_SHIFT) |
++				       (6 << R300_MSBD0_Y_SHIFT) |
++				       (6 << R300_MSBD0_X_SHIFT)));
++	OUT_ACCEL_REG(R300_GB_MSPOS1, ((6 << R300_MS_X3_SHIFT) |
++				       (6 << R300_MS_Y3_SHIFT) |
++				       (6 << R300_MS_X4_SHIFT) |
++				       (6 << R300_MS_Y4_SHIFT) |
++				       (6 << R300_MS_X5_SHIFT) |
++				       (6 << R300_MS_Y5_SHIFT) |
++				       (6 << R300_MSBD1_SHIFT)));
+ 	FINISH_ACCEL();
+ 
+ 	BEGIN_ACCEL(5);
+@@ -557,10 +557,10 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
+ 	OUT_ACCEL_REG(R300_SC_EDGERULE, 0xA5294A5);
+ 	if (IS_R300_3D) {
+ 	    /* clip has offset 1440 */
+-	    OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1088 << R300_CLIP_X_SHIFT) |
+-					     (1088 << R300_CLIP_Y_SHIFT)));
+-	    OUT_ACCEL_REG(R300_SC_CLIP_0_B, (((1080 + 2920) << R300_CLIP_X_SHIFT) |
+-					     ((1080 + 2920) << R300_CLIP_Y_SHIFT)));
++	    OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1440 << R300_CLIP_X_SHIFT) |
++					     (1440 << R300_CLIP_Y_SHIFT)));
++	    OUT_ACCEL_REG(R300_SC_CLIP_0_B, ((4080 << R300_CLIP_X_SHIFT) |
++					     (4080 << R300_CLIP_Y_SHIFT)));
+ 	} else {
+ 	    OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((0 << R300_CLIP_X_SHIFT) |
+ 					     (0 << R300_CLIP_Y_SHIFT)));
+diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
+index ca46505..b49c2fb 100644
+--- a/src/radeon_exa_render.c
++++ b/src/radeon_exa_render.c
+@@ -1718,7 +1718,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
+ 			   R300_RS_COUNT_HIRES_EN));
+ 
+ 	    /* R300_INST_COUNT_RS - highest RS instruction used */
+-	    OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) | R300_TX_OFFSET_RS(6));
++	    OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1));
+ 
+ 	    OUT_ACCEL_REG(R300_US_CODE_OFFSET, (R300_ALU_CODE_OFFSET(0) |
+ 						R300_ALU_CODE_SIZE(0) |
+@@ -1740,7 +1740,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
+ 			  ((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
+ 			   R300_RS_COUNT_HIRES_EN));
+ 
+-	    OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
++	    OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));
+ 
+ 	    OUT_ACCEL_REG(R300_US_CODE_OFFSET, (R300_ALU_CODE_OFFSET(0) |
+ 						R300_ALU_CODE_SIZE(0) |
+@@ -1967,7 +1967,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
+ 			   R300_RS_COUNT_HIRES_EN));
+ 
+ 	    /* 2 RS instructions: 1 for tex0 (src), 1 for tex1 (mask) */
+-	    OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) | R300_TX_OFFSET_RS(6));
++	    OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1));
+ 
+ 	    OUT_ACCEL_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
+ 					      R500_US_CODE_END_ADDR(2)));
+@@ -1979,7 +1979,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
+ 			  ((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
+ 			   R300_RS_COUNT_HIRES_EN));
+ 
+-	    OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
++	    OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));
+ 
+ 	    OUT_ACCEL_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
+ 					      R500_US_CODE_END_ADDR(1)));
+@@ -2159,8 +2159,12 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
+ 
+     /* Clear out scissoring */
+     BEGIN_ACCEL(2);
+-    OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) |
+-				     (0 << R300_SCISSOR_Y_SHIFT)));
++    if (IS_R300_3D)
++	OUT_ACCEL_REG(R300_SC_SCISSOR0, ((1440 << R300_SCISSOR_X_SHIFT) |
++					 (1440 << R300_SCISSOR_Y_SHIFT)));
++    else
++	OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) |
++					 (0 << R300_SCISSOR_Y_SHIFT)));
+     OUT_ACCEL_REG(R300_SC_SCISSOR1, ((8191 << R300_SCISSOR_X_SHIFT) |
+ 				     (8191 << R300_SCISSOR_Y_SHIFT)));
+     FINISH_ACCEL();
+diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
+index 852f4ac..bc4101a 100644
+--- a/src/radeon_textured_videofuncs.c
++++ b/src/radeon_textured_videofuncs.c
+@@ -458,7 +458,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ 						   R300_RS_COUNT_HIRES_EN));
+ 
+ 		/* R300_INST_COUNT_RS - highest RS instruction used */
+-		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) | R300_TX_OFFSET_RS(6));
++		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1));
+ 
+ 		/* Pixel stack frame size. */
+ 		OUT_ACCEL_REG(R300_US_PIXSIZE, 5);
+@@ -835,7 +835,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ 			  ((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
+ 			   R300_RS_COUNT_HIRES_EN));
+ 		/* R300_INST_COUNT_RS - highest RS instruction used */
+-		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
++		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));
+ 
+ 		OUT_ACCEL_REG(R300_US_PIXSIZE, 2); /* highest temp used */
+ 
+@@ -967,7 +967,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ 			  ((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
+ 			   R300_RS_COUNT_HIRES_EN));
+ 		/* R300_INST_COUNT_RS - highest RS instruction used */
+-		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
++		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));
+ 
+ 		OUT_ACCEL_REG(R300_US_PIXSIZE, 0); /* highest temp used */
+ 
+@@ -1040,7 +1040,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ 			       R300_RS_COUNT_HIRES_EN));
+ 
+ 		/* R300_INST_COUNT_RS - highest RS instruction used */
+-		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) | R300_TX_OFFSET_RS(6));
++		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1));
+ 
+ 		/* Pixel stack frame size. */
+ 		OUT_ACCEL_REG(R300_US_PIXSIZE, 5);
+@@ -1512,7 +1512,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ 			       R300_RS_COUNT_HIRES_EN));
+ 
+ 		/* R300_INST_COUNT_RS - highest RS instruction used */
+-		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
++		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));
+ 
+ 		/* Pixel stack frame size. */
+ 		OUT_ACCEL_REG(R300_US_PIXSIZE, 0); /* highest temp used */
+@@ -1601,7 +1601,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ 	    }
+ 	}
+ 
+-	qwords = info->new_cs ? 8 : 6;
++	qwords = info->new_cs ? 7 : 6;
+ 	BEGIN_ACCEL(qwords);
+ 	OUT_ACCEL_REG(R300_TX_INVALTAGS, 0);
+ 	OUT_ACCEL_REG(R300_TX_ENABLE, txenable);
+@@ -2131,10 +2131,10 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ 	    BEGIN_ACCEL(2);
+ 	    if (IS_R300_3D) {
+ 		/* R300 has an offset */
+-		OUT_ACCEL_REG(R300_SC_SCISSOR0, (((dstX + 1088) << R300_SCISSOR_X_SHIFT) |
+-						 ((dstY + 1088) << R300_SCISSOR_Y_SHIFT)));
+-		OUT_ACCEL_REG(R300_SC_SCISSOR1, (((dstX + dstw + 1088 - 1) << R300_SCISSOR_X_SHIFT) |
+-						 ((dstY + dsth + 1088 - 1) << R300_SCISSOR_Y_SHIFT)));
++	        OUT_ACCEL_REG(R300_SC_SCISSOR0, (((dstX + 1440) << R300_SCISSOR_X_SHIFT) |
++                                                 ((dstY + 1440) << R300_SCISSOR_Y_SHIFT)));
++                OUT_ACCEL_REG(R300_SC_SCISSOR1, (((dstX + dstw + 1440 - 1) << R300_SCISSOR_X_SHIFT) |
++                                                 ((dstY + dsth + 1440 - 1) << R300_SCISSOR_Y_SHIFT)));
+ 	    } else {
+ 		OUT_ACCEL_REG(R300_SC_SCISSOR0, (((dstX) << R300_SCISSOR_X_SHIFT) |
+ 						 ((dstY) << R300_SCISSOR_Y_SHIFT)));


Index: xorg-x11-drv-ati.spec
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/F-11/xorg-x11-drv-ati.spec,v
retrieving revision 1.185
retrieving revision 1.186
diff -u -p -r1.185 -r1.186
--- xorg-x11-drv-ati.spec	28 Apr 2009 10:05:56 -0000	1.185
+++ xorg-x11-drv-ati.spec	5 May 2009 05:34:42 -0000	1.186
@@ -5,7 +5,7 @@
 Summary:   Xorg X11 ati video driver
 Name:      xorg-x11-drv-ati
 Version:   6.12.2
-Release:   9%{?dist}
+Release:   10%{?dist}
 URL:       http://www.x.org
 License:   MIT
 Group:     User Interface/X Hardware Support
@@ -15,11 +15,9 @@ Source0:   http://www.x.org/pub/individu
 Source1:   radeon.xinf
 
 Patch1:     radeon-modeset.patch
+Patch2:     radeon-modeset-fixes.patch
 Patch6:     radeon-6.9.0-bgnr-enable.patch
 Patch7:	    radeon-6.12.1-r600-fb-size.patch
-Patch8:	    radeon-6.12.2-kms-gamma.patch
-Patch9:     radeon-6.12.2-fix-rs690-clamp.patch
-Patch10:    radeon-6.12.2-fix-xv-warning.patch
 
 ExcludeArch: s390 s390x
 
@@ -42,11 +40,9 @@ X.Org X11 ati video driver.
 %prep
 %setup -q -n %{tarball}-%{version}
 %patch1 -p1 -b .modeset
+%patch2 -p1 -b .modeset-fixes
 %patch6 -p1 -b .bgnr
 %patch7 -p1 -b .r600-fb-size
-%patch8 -p1 -b .kms-gamma
-%patch9 -p1 -b .rs690clamp
-%patch10 -p1 -b .fix-xvwarn
 
 %build
 autoreconf -iv
@@ -78,6 +74,9 @@ rm -rf $RPM_BUILD_ROOT
 %{_mandir}/man4/radeon.4*
 
 %changelog
+* Tue May 05 2009 Dave Airlie <airlied at redhat.com> 6.12.2-10
+- radeon-modeset-fixes.patch: backport fixes from upstream for rs480 firefox gpu crash
+
 * Tue Apr 28 2009 Dave Airlie <airlied at redhat.com> 6.12.2-9
 - fix gamma code to work properly
 - bump kernel requires for gamma interface not oopsing


--- radeon-6.12.2-fix-rs690-clamp.patch DELETED ---


--- radeon-6.12.2-fix-xv-warning.patch DELETED ---


--- radeon-6.12.2-kms-gamma.patch DELETED ---




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