rpms/kernel/F-11 drm-i915-apply-a-big-hammer-to-865-gem-object.patch, NONE, 1.1 drm-i915-fix-tiling-pitch.patch, NONE, 1.1 drm-intel-disable-kms-i8xx.patch, 1.1, 1.2 drm-no-gem-on-i8xx.patch, 1.1, 1.2 kernel.spec, 1.1626, 1.1627

Kyle McMartin kyle at fedoraproject.org
Wed May 27 20:12:01 UTC 2009


Author: kyle

Update of /cvs/pkgs/rpms/kernel/F-11
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv17745

Modified Files:
	drm-intel-disable-kms-i8xx.patch drm-no-gem-on-i8xx.patch 
	kernel.spec 
Added Files:
	drm-i915-apply-a-big-hammer-to-865-gem-object.patch 
	drm-i915-fix-tiling-pitch.patch 
Log Message:
* Wed May 27 2009 Kyle McMartin <kyle at redhat.com> 2.6.29.4-165
- Enable KMS/gem on I865.
- drm-no-gem-on-i8xx.patch: Remove I865 so GEM will be enabled.
- drm-intel-disable-kms-i8xx.patch: Enable KMS on I865. 
- Two fixes from Eric Anholt to fix i8x5:
   drm-i915-apply-a-big-hammer-to-865-gem-object.patch
   drm-i915-fix-tiling-pitch.patch


drm-i915-apply-a-big-hammer-to-865-gem-object.patch:

--- NEW FILE drm-i915-apply-a-big-hammer-to-865-gem-object.patch ---
>From cfa16a0de5392c54db553ec2233a7110e4b4da7a Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric at anholt.net>
Date: Tue, 26 May 2009 18:46:16 -0700
Subject: [PATCH 2/2] drm/i915: Apply a big hammer to 865 GEM object CPU cache flushing.

On the 865, but not the 855, the clflush we do appears to not actually make
it out to the hardware all the time.  An easy way to safely reproduce was
X -retro, which would show that some of the blits involved in drawing the
lovely root weave didn't make it out to the hardware.  Those blits are 32
bytes each, and 1-2 would be missing at various points around the screen.
Other experimentation (doing more clflush, doing more AGP chipset flush,
poking at some more device registers to maybe trigger more flushing) didn't
help.  krh came up with the wbinvd as a way to successfully get all those
blits to appear.

Signed-off-by: Eric Anholt <eric at anholt.net>
---
 drivers/gpu/drm/i915/i915_gem.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e4408da..e242186 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2423,6 +2423,16 @@ i915_gem_clflush_object(struct drm_gem_object *obj)
 	if (obj_priv->pages == NULL)
 		return;
 
+	/* XXX: The 865 in particular appears to be weird in how it handles
+	 * cache flushing.  We haven't figured it out, but the
+	 * clflush+agp_chipset_flush doesn't appear to successfully get the
+	 * data visible to the PGU, while wbinvd + agp_chipset_flush does.
+	 */
+	if (IS_I865G(obj->dev)) {
+		wbinvd();
+		return;
+	}
+
 	drm_clflush_pages(obj_priv->pages, obj->size / PAGE_SIZE);
 }
 
-- 
1.6.2.2


drm-i915-fix-tiling-pitch.patch:

--- NEW FILE drm-i915-fix-tiling-pitch.patch ---
>From e76a16deb8785317a23cca7204331af053e0fb4e Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric at anholt.net>
Date: Tue, 26 May 2009 17:44:56 -0700
Subject: [PATCH 1/2] drm/i915: Fix tiling pitch handling on 8xx.

The pitch field is an exponent on pre-965, so we were rejecting buffers
on 8xx that we shouldn't have.  915 got lucky in that the largest legal
value happened to match (8KB / 512 = 0x10), but 8xx has a smaller tile width.
Additionally, we programmed that bad value into the register on 8xx, so the
only pitch that would work correctly was 4096 (512-1023 pixels), while others
would probably give bad rendering or hangs.

Signed-off-by: Eric Anholt <eric at anholt.net>

fd.o bug #20473.
---
 drivers/gpu/drm/i915/i915_gem.c        |    6 ++++--
 drivers/gpu/drm/i915/i915_gem_tiling.c |   14 +++++++++++---
 drivers/gpu/drm/i915/i915_reg.h        |    3 ++-
 3 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 717b6a8..e4408da 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2128,8 +2128,10 @@ static void i830_write_fence_reg(struct drm_i915_fence_reg *reg)
 		return;
 	}
 
-	pitch_val = (obj_priv->stride / 128) - 1;
-	WARN_ON(pitch_val & ~0x0000000f);
+	pitch_val = obj_priv->stride / 128;
+	pitch_val = ffs(pitch_val) - 1;
+	WARN_ON(pitch_val > I830_FENCE_MAX_PITCH_VAL);
+
 	val = obj_priv->gtt_offset;
 	if (obj_priv->tiling_mode == I915_TILING_Y)
 		val |= 1 << I830_FENCE_TILING_Y_SHIFT;
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 52a0593..540dd33 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -213,7 +213,8 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
 	if (tiling_mode == I915_TILING_NONE)
 		return true;
 
-	if (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))
+	if (!IS_I9XX(dev) ||
+	    (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)))
 		tile_width = 128;
 	else
 		tile_width = 512;
@@ -225,11 +226,18 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
 		if (stride / 128 > I965_FENCE_MAX_PITCH_VAL)
 			return false;
 	} else if (IS_I9XX(dev)) {
-		if (stride / tile_width > I830_FENCE_MAX_PITCH_VAL ||
+		uint32_t pitch_val = ffs(stride / tile_width) - 1;
+
+		/* XXX: For Y tiling, FENCE_MAX_PITCH_VAL is actually 6 (8KB)
+		 * instead of 4 (2KB) on 945s.
+		 */
+		if (pitch_val > I915_FENCE_MAX_PITCH_VAL ||
 		    size > (I830_FENCE_MAX_SIZE_VAL << 20))
 			return false;
 	} else {
-		if (stride / 128 > I830_FENCE_MAX_PITCH_VAL ||
+		uint32_t pitch_val = ffs(stride / tile_width) - 1;
+
+		if (pitch_val > I830_FENCE_MAX_PITCH_VAL ||
 		    size > (I830_FENCE_MAX_SIZE_VAL << 19))
 			return false;
 	}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9668cc0..375569d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -190,7 +190,8 @@
 #define   I830_FENCE_SIZE_BITS(size)	((ffs((size) >> 19) - 1) << 8)
 #define   I830_FENCE_PITCH_SHIFT	4
 #define   I830_FENCE_REG_VALID		(1<<0)
-#define   I830_FENCE_MAX_PITCH_VAL	0x10
+#define   I915_FENCE_MAX_PITCH_VAL	0x10
+#define   I830_FENCE_MAX_PITCH_VAL	6
 #define   I830_FENCE_MAX_SIZE_VAL	(1<<8)
 
 #define   I915_FENCE_START_MASK		0x0ff00000
-- 
1.6.2.2


drm-intel-disable-kms-i8xx.patch:

Index: drm-intel-disable-kms-i8xx.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-11/drm-intel-disable-kms-i8xx.patch,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -p -r1.1 -r1.2
--- drm-intel-disable-kms-i8xx.patch	27 May 2009 17:30:09 -0000	1.1
+++ drm-intel-disable-kms-i8xx.patch	27 May 2009 20:12:00 -0000	1.2
@@ -10,7 +10,7 @@ index 98560e1..0d0ff31 100644
  #include <linux/device.h>
  #include "drmP.h"
  #include "drm.h"
-@@ -222,6 +223,14 @@ static struct drm_driver driver = {
+@@ -222,6 +223,13 @@ static struct drm_driver driver = {
  	.patchlevel = DRIVER_PATCHLEVEL,
  };
  
@@ -18,7 +18,6 @@ index 98560e1..0d0ff31 100644
 +static struct pci_device_id i915_kms_disabled[] = {
 +	{ PCI_DEVICE(0x8086, 0x2562) }, /* IS_I845G */
 +	{ PCI_DEVICE(0x8086, 0x3582) }, /* IS_I855 */
-+	{ PCI_DEVICE(0x8086, 0x2572) }, /* IS_I865G */
 +	{ 0, }
 +};
 +

drm-no-gem-on-i8xx.patch:

Index: drm-no-gem-on-i8xx.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-11/drm-no-gem-on-i8xx.patch,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -p -r1.1 -r1.2
--- drm-no-gem-on-i8xx.patch	9 Feb 2009 04:45:32 -0000	1.1
+++ drm-no-gem-on-i8xx.patch	27 May 2009 20:12:00 -0000	1.2
@@ -22,7 +22,7 @@ index a70bf77..84664fe 100644
  #define IS_I865G(dev) ((dev)->pci_device == 0x2572)
  
 +#define IS_I8XX(dev)	(IS_I830(dev) || IS_845G(dev) || IS_I85X(dev) ||	\
-+				IS_I855(dev) || IS_I865G(dev))
++				IS_I855(dev))
 +
  #define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
  #define IS_I915GM(dev) ((dev)->pci_device == 0x2592)


Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-11/kernel.spec,v
retrieving revision 1.1626
retrieving revision 1.1627
diff -u -p -r1.1626 -r1.1627
--- kernel.spec	27 May 2009 17:30:09 -0000	1.1626
+++ kernel.spec	27 May 2009 20:12:00 -0000	1.1627
@@ -710,6 +710,8 @@ Patch1833: drm-intel-i8xx-cursors.patch
 Patch1834: drm-intel-vmalloc.patch
 Patch1835: drm-copyback-ioctl-data-to-userspace-regardless-of-retcode.patch
 Patch1836: drm-intel-disable-kms-i8xx.patch
+Patch1837: drm-i915-apply-a-big-hammer-to-865-gem-object.patch
+Patch1838: drm-i915-fix-tiling-pitch.patch
 
 # kludge to make ich9 e1000 work
 Patch2000: linux-2.6-e1000-ich9.patch
@@ -1386,6 +1388,8 @@ ApplyPatch drm-intel-i8xx-cursors.patch
 ApplyPatch drm-intel-vmalloc.patch
 ApplyPatch drm-copyback-ioctl-data-to-userspace-regardless-of-retcode.patch
 ApplyPatch drm-intel-disable-kms-i8xx.patch
+ApplyPatch drm-i915-apply-a-big-hammer-to-865-gem-object.patch
+ApplyPatch drm-i915-fix-tiling-pitch.patch
 
 # linux1394 git patches
 ApplyPatch linux-2.6-firewire-git-update.patch
@@ -2012,6 +2016,14 @@ fi
 # and build.
 
 %changelog
+* Wed May 27 2009 Kyle McMartin <kyle at redhat.com> 2.6.29.4-165
+- Enable KMS/gem on I865.
+- drm-no-gem-on-i8xx.patch: Remove I865 so GEM will be enabled.
+- drm-intel-disable-kms-i8xx.patch: Enable KMS on I865. 
+- Two fixes from Eric Anholt to fix i8x5:
+   drm-i915-apply-a-big-hammer-to-865-gem-object.patch
+   drm-i915-fix-tiling-pitch.patch
+
 * Wed May 27 2009 Kyle McMartin <kyle at redhat.com> 2.6.29.4-164
 - drm-intel-disable-kms-i8xx.patch: disable KMS by default on 845, 855,
   and 865. It can be forced on with i915.modeset=1 boot parameter.




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