A couple of DRAM memory stick questions ??

[William Case]

Hi David;


On Mon, 2009-09-28 at 08:17 +1000, David Timms wrote:
> On 09/28/2009 01:07 AM, William Case wrote:
> > I have been re-reading some notes I have made on how DRAM works.  As a
> > result I have a couple of unanswered questions?
> http://en.wikipedia.org/wiki/Dynamic_random_access_memory
> has some pretty pictures, surely you found/searched that already ?
> 

Yes.  Found that a while ago.  It is a good example of why I am asking. 

The second diagram shows a set of 4 X 4 arrays  -- with a major
disclaimer about its accuracy at the bottom.  I have also seen other
sites plus a couple of text books I own that show the cell arrangement
as a linear setup.  But only for 32 bit machines.  I found nothing for
64 bit DRAM.  I do have the schematics for my CPU which has 64 bit SRAM
(latch) registers.

As I tried to explain, both probably exist, although I don't know that
for sure.  The actual operation of the DRAM isn't altered under either
arrangement.  The word line (row) and the bit line (column) are just
organized slightly differently.  The real problem is that the caption on
any diagram I view is never clear on whether I am being shown just a
concept or an actual arrangement.

I tend to visualize, in order to understand things better, such
operations as reading from and writing to memory .  It would help if I
could have in my mind's eye the actual arrangement of cells for the most
commonly used, current, DRAM for a 64 bit machine.

I have searched, on and off, over the last six months for something
definitive.  I have tried DRAM manufacturers sites for specifications
that would be helpful.  It seems that internal arrangements of memory
cells must be proprietary.

So I turned to the mail list to see if there where any engineers who
knew what the typical DRAM cell arrangement usually is.

-- 
Regards Bill
Fedora 11, Gnome 2.26.3
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