[Date Prev][Date Next]   [Thread Prev][Thread Next]   [Thread Index] [Date Index] [Author Index]

Fedora 10 Update: verilator-3.712-1.fc10



--------------------------------------------------------------------------------
Fedora Update Notification
FEDORA-2009-8024
2009-07-27 21:06:06
--------------------------------------------------------------------------------

Name        : verilator
Product     : Fedora 10
Version     : 3.712
Release     : 1.fc10
URL         : http://www.veripool.com/verilator.html
Summary     : A fast simulator for synthesizable Verilog
Description :

Verilator is the fastest free Verilog HDL simulator. It compiles
synthesizable Verilog, plus some PSL, SystemVerilog and Synthesis
assertions into C++ or SystemC code. It is designed for large projects
where fast simulation performance is of primary concern, and is
especially well suited to create executable models of CPUs for
embedded software design teams.

Authors:
--------

Wilson Snyder
Paul Wasson
Duane Galbi

--------------------------------------------------------------------------------
Update Information:

A fast simulator of synthesizable Verilog HDL
--------------------------------------------------------------------------------
References:

  [ 1 ] Bug #468516 - Review Request: verilator - A fast simulator of synthesizable Verilog HDL
        https://bugzilla.redhat.com/show_bug.cgi?id=468516
--------------------------------------------------------------------------------

This update can be installed with the "yum" update program.  Use 
su -c 'yum update verilator' at the command line.
For more information, refer to "Managing Software with yum",
available at http://docs.fedoraproject.org/yum/.

All packages are signed with the Fedora Project GPG key.  More details on the
GPG keys used by the Fedora Project can be found at
http://fedoraproject.org/keys
--------------------------------------------------------------------------------


[Date Prev][Date Next]   [Thread Prev][Thread Next]   [Thread Index] [Date Index] [Author Index]