[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

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https://bugzilla.redhat.com/show_bug.cgi?id=468516





--- Comment #31 from Lane <dirjud at gmail.com>  2009-06-09 15:26:11 EDT ---
I updated verilator to the latest 3.710 and also switched to using the
SYSTEMPERL_INCLUDE env variable to be compatible with the systemperl
installation location.

Spec URL: http://brooks.nu/~lane/verilator.spec
SRPM URL: http://brooks.nu/~lane/verilator-3.710-1.fc10.src.rpm

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