[libvirt] [PATCH 09/13] conf: new pci controller model "pcie-switch-upstream-port"

[Laine Stump]

On 06/23/2015 11:23 AM, Alex Williamson wrote:
> On Mon, 2015-06-22 at 14:44 -0400, Laine Stump wrote:
>> diff --git a/src/conf/domain_addr.c b/src/conf/domain_addr.c
>> index 4b5e81e..59da745 100644
>> --- a/src/conf/domain_addr.c
>> +++ b/src/conf/domain_addr.c
>> @@ -57,6 +57,9 @@ virDomainPCIAddressFlagsCompatible(virDevicePCIAddressPtr addr,
>>          if (devFlags & VIR_PCI_CONNECT_HOTPLUGGABLE)
>>              busFlags |= VIR_PCI_CONNECT_HOTPLUGGABLE;
>>      }
>> +    /* devices with PCIE_ONLY can't connect to PCI, even if fromConfig */
>> +    if (devFlags & VIR_PCI_CONNECT_TYPE_PCIE_ONLY)
>> +       devFlags |= VIR_PCI_CONNECT_TYPE_PCIE;
>>  
>>      /* If this bus doesn't allow the type of connection (PCI
>>       * vs. PCIe) required by the device, or if the device requires
>> @@ -199,8 +202,14 @@ virDomainPCIAddressBusSetModel(virDomainPCIAddressBusPtr bus,
>>      case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT_PORT:
>>          /* provides one slot which is pcie and hotpluggable */
>>          bus->flags = VIR_PCI_CONNECT_TYPE_PCIE | VIR_PCI_CONNECT_HOTPLUGGABLE;
>> +        bus->minSlot = 0;
>> +        bus->maxSlot = 0;
> Shouldn't this have belonged to a previous patch?

Yes, and I'm pretty certain that it originally was. I must have messed
it up when resolving merge conflicts during my myriads of rebases to
change names.

>
>> +        break;
>> +    case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_UPSTREAM_PORT:
>> +        /* 31 slots, can only accept pcie-switch-port, no hotplug */
>> +        bus->flags = VIR_PCI_CONNECT_TYPE_PCIE_SWITCH;
>>          bus->minSlot = 1;
>> -        bus->maxSlot = 1;
>> +        bus->maxSlot = 31;
> Why exactly are we reserving slot 0? 


Uh, because I forgot to change it after talking to you? Thanks for
catching it!


>  I know we discussed on IRC that
> slot 0 is reserved for the host bridge on root buses, but there are no
> reserved slots downstream of an upstream switch port.

(Btw, I've forgotten - is slot 0 also reserved for pci-bridge and
82801b11-bridge? Or can I send a patch to allow slot 0 on those as well?)