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[libvirt] [PATCHv10 2/2] cpu_map: Add Cascadelake Server CPU model



Cascadelake Server CPU is introduced in QEMU
by commit c7a88b52f62b30c04158eeb07f73e3f72221b6a8,
add the CPU model in libvirt accordingly.

Signed-off-by: Wang Huaqiang <huaqiang wang intel com>
---
 src/cpu_map/Makefile.inc.am            |  1 +
 src/cpu_map/index.xml                  |  1 +
 src/cpu_map/x86_Cascadelake-Server.xml | 83 ++++++++++++++++++++++++++++++++++
 3 files changed, 85 insertions(+)
 create mode 100644 src/cpu_map/x86_Cascadelake-Server.xml

diff --git a/src/cpu_map/Makefile.inc.am b/src/cpu_map/Makefile.inc.am
index 9eeb33e..c74164c 100644
--- a/src/cpu_map/Makefile.inc.am
+++ b/src/cpu_map/Makefile.inc.am
@@ -21,6 +21,7 @@ cpumap_DATA = \
 	cpu_map/x86_coreduo.xml \
 	cpu_map/x86_cpu64-rhel5.xml \
 	cpu_map/x86_cpu64-rhel6.xml \
+	cpu_map/x86_Cascadelake-Server.xml \
 	cpu_map/x86_EPYC.xml \
 	cpu_map/x86_EPYC-IBRS.xml \
 	cpu_map/x86_Haswell.xml \
diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml
index dccda39..8d31a48 100644
--- a/src/cpu_map/index.xml
+++ b/src/cpu_map/index.xml
@@ -48,6 +48,7 @@
     <include filename="x86_Skylake-Server-IBRS.xml"/>
     <include filename="x86_Icelake-Client.xml"/>
     <include filename="x86_Icelake-Server.xml"/>
+    <include filename="x86_Cascadelake-Server.xml"/>
 
     <!-- AMD CPUs -->
     <include filename="x86_athlon.xml"/>
diff --git a/src/cpu_map/x86_Cascadelake-Server.xml b/src/cpu_map/x86_Cascadelake-Server.xml
new file mode 100644
index 0000000..cbf6ea9
--- /dev/null
+++ b/src/cpu_map/x86_Cascadelake-Server.xml
@@ -0,0 +1,83 @@
+<cpus>
+  <model name='Cascadelake-Server'>
+    <signature family='6' model='85' stepping='6'/>
+    <vendor name='Intel'/>
+    <feature name='3dnowprefetch'/>
+    <feature name='abm'/>
+    <feature name='adx'/>
+    <feature name='aes'/>
+    <feature name='apic'/>
+    <feature name='arat'/>
+    <feature name='avx'/>
+    <feature name='avx2'/>
+    <feature name='avx512bw'/>
+    <feature name='avx512cd'/>
+    <feature name='avx512dq'/>
+    <feature name='avx512f'/>
+    <feature name='avx512vl'/>
+    <feature name='avx512vnni'/>
+    <feature name='bmi1'/>
+    <feature name='bmi2'/>
+    <feature name='clflush'/>
+    <feature name='clflushopt'/>
+    <feature name='clwb'/>
+    <feature name='cmov'/>
+    <feature name='cx16'/>
+    <feature name='cx8'/>
+    <feature name='de'/>
+    <feature name='erms'/>
+    <feature name='f16c'/>
+    <feature name='fma'/>
+    <feature name='fpu'/>
+    <feature name='fsgsbase'/>
+    <feature name='fxsr'/>
+    <feature name='hle'/>
+    <feature name='intel-pt'/>
+    <feature name='invpcid'/>
+    <feature name='lahf_lm'/>
+    <feature name='lm'/>
+    <feature name='mca'/>
+    <feature name='mce'/>
+    <feature name='mmx'/>
+    <feature name='movbe'/>
+    <feature name='mpx'/>
+    <feature name='msr'/>
+    <feature name='mtrr'/>
+    <feature name='nx'/>
+    <!-- 'ospke' is a dynamic feature and cannot be enabled manually
+         see QEMU's commit 9ccb9784b57 for more details -->
+    <feature name='pae'/>
+    <feature name='pat'/>
+    <feature name='pcid'/>
+    <feature name='pclmuldq'/>
+    <feature name='pdpe1gb'/>
+    <feature name='pge'/>
+    <feature name='pni'/>
+    <feature name='popcnt'/>
+    <feature name='pse'/>
+    <feature name='pse36'/>
+    <feature name='pku'/>
+    <feature name='rdrand'/>
+    <feature name='rdseed'/>
+    <feature name='rdtscp'/>
+    <feature name='rtm'/>
+    <feature name='sep'/>
+    <feature name='smap'/>
+    <feature name='smep'/>
+    <feature name='spec-ctrl'/>
+    <feature name='sse'/>
+    <feature name='sse2'/>
+    <feature name='sse4.1'/>
+    <feature name='sse4.2'/>
+    <feature name='ssse3'/>
+    <feature name='syscall'/>
+    <feature name='tsc'/>
+    <feature name='tsc-deadline'/>
+    <feature name='vme'/>
+    <feature name='x2apic'/>
+    <feature name='xgetbv1'/>
+    <feature name='xsave'/>
+    <feature name='xsavec'/>
+    <feature name='xsaveopt'/>
+  </model>
+</cpus>
-- 
2.7.4


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