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Re: [vfio-users] Distinguishing Logical and HT Cores, Cpu-latencies Script Results



Thanks, that worked well!
lstopo and the output of these commands are in agreement.
I consider this mystery (for me anyway) solved.

On Sat, Mar 5, 2016 at 8:57 AM, Samuel Holland <samuel sholland org> wrote:
On 03/04/2016 05:37 PM, Jeff wrote:
The output of lstopo shows that 0-6, 1-7, etc... are paired, which
is what I originally assumed (as a 4790k is 0-4, 1-5, with similar
architecture so I'd assume similar), but different from the virsh
capabilities output (which did not list siblings correctly for me)

If you want to get the information directly from the kernel, try:

grep . /sys/bus/cpu/devices/*/topology/core_id
grep . /sys/bus/cpu/devices/*/topology/thread_siblings_list

Pic: https://www.dropbox.com/s/m79l36e32f08b8d/out.png?dl=0 XML:
https://www.dropbox.com/s/wr93edyszlpcosm/summary.xml?dl=0 So with
all of that said, is it safe to say the pairings are 0-6, 1-7, 2-8,
3-9, 4-10, 5-11 for a 5930k?

That seems to be generally how it works. My Xeon X5675 also has:

/sys/bus/cpu/devices/cpu0/topology/thread_siblings_list:0,6
/sys/bus/cpu/devices/cpu1/topology/thread_siblings_list:1,7
/sys/bus/cpu/devices/cpu2/topology/thread_siblings_list:2,8
/sys/bus/cpu/devices/cpu3/topology/thread_siblings_list:3,9
/sys/bus/cpu/devices/cpu4/topology/thread_siblings_list:4,10
/sys/bus/cpu/devices/cpu5/topology/thread_siblings_list:5,11
/sys/bus/cpu/devices/cpu6/topology/thread_siblings_list:0,6
/sys/bus/cpu/devices/cpu7/topology/thread_siblings_list:1,7
/sys/bus/cpu/devices/cpu8/topology/thread_siblings_list:2,8
/sys/bus/cpu/devices/cpu9/topology/thread_siblings_list:3,9
/sys/bus/cpu/devices/cpu10/topology/thread_siblings_list:4,10
/sys/bus/cpu/devices/cpu11/topology/thread_siblings_list:5,11

I know that in the past, there could be some variation between boots,
but that seems to no longer be the case.

Just want to make sure.
> Thanks!

--
Regards,
Samuel Holland <samuel sholland org>


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