[vfio-users] VFIO for PCIe streaming from/to user space

Oliver Heid Oliver.Heid at h-next.de
Thu Feb 22 20:52:21 UTC 2018


After registering e.g. MSI 0 with

__s32 msifd = eventfd(0, 0);

     struct vfio_irq_set *irq_set;

     irq_set=(struct vfio_irq_set *)malloc(sizeof(struct vfio_irq_set) + 
sizeof(__s32));

     irq_set->argsz = sizeof(struct vfio_irq_set) + sizeof(__s32);
     irq_set->index = VFIO_PCI_MSI_IRQ_INDEX;
     irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | 
VFIO_IRQ_SET_ACTION_TRIGGER;
     irq_set->start = 0;
     irq_set->count = 1;
     *(__s32*)&irq_set->data = msifd;
     ioctl(device, VFIO_DEVICE_SET_IRQS, irq_set);

any read by

     __u64 value = 0;
     int ret = read(msifd,&value,sizeof(value));

should acknowledge the MSI, right? Or did I miss something?


------------------------------------------------------------------------

*From:* Alex Williamson <mailto:alex.williamson at redhat.com>
*Sent:* Wednesday, February 14, 2018 10:18PM
*To:* Heid, Oliver <mailto:oliver.heid at h-next.de>
*Cc:* Vfio-users <mailto:vfio-users at redhat.com>
*Subject:* Re: [vfio-users] VFIO for PCIe streaming from/to user space


On Wed, 14 Feb 2018 22:06:35 +0100
Oliver Heid <oliver.heid at h-next.de> wrote:

> Regarding the vfio_device_info struct: I get 9 device regions, of which
> region 0, 2 and 4 seem to be the three BAR regions. Is that so? Always?
> What do the other regions do?

This is all answered in the API:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/uapi/linux/vfio.h

/*
  * The VFIO-PCI bus driver makes use of the following fixed region and
  * IRQ index mapping.  Unimplemented regions return a size of zero.
  * Unimplemented IRQ types return a count of zero.
  */
enum {
	VFIO_PCI_BAR0_REGION_INDEX,
	VFIO_PCI_BAR1_REGION_INDEX,
	VFIO_PCI_BAR2_REGION_INDEX,
	VFIO_PCI_BAR3_REGION_INDEX,
	VFIO_PCI_BAR4_REGION_INDEX,
	VFIO_PCI_BAR5_REGION_INDEX,
	VFIO_PCI_ROM_REGION_INDEX,
	VFIO_PCI_CONFIG_REGION_INDEX,
	/*
	 * Expose VGA regions defined for PCI base class 03, subclass 00.
	 * This includes I/O port ranges 0x3b0 to 0x3bb and 0x3c0 to 0x3df
	 * as well as the MMIO range 0xa0000 to 0xbffff.  Each implemented
	 * range is found at it's identity mapped offset from the region
	 * offset, for example 0x3b0 is region_info.offset + 0x3b0.  Areas
	 * between described ranges are unimplemented.
	 */
	VFIO_PCI_VGA_REGION_INDEX,
	VFIO_PCI_NUM_REGIONS = 9 /* Fixed user ABI, region indexes >=9 use */
				 /* device specific cap to define content. */
};

  

> And by mmap of PCIe config space you mean mapping the files
> /sys/bus/pci/devices/0000:xx:yy.z/resource0 ?!

No, use the VFIO_PCI_CONFIG_REGION_INDEX region.


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