The initial release of the RISC-V Developer Preview, based on Red Hat Enterprise Linux (RHEL) 10.0, was in May 2025. Today, Red Hat is releasing a software refresh to that Developer Preview to update the code to RHEL 10.2. The hardware platform remains the same (SiFive HiFive Premier P550), but the new release contains more of the upstream code specifically for that platform as well as incremental upstream updates for support of the RISC-V instruction set architecture. Red Hat continues to work to integrate RISC-V support into the upstream community.

The addition of the upstream code may enable a number of additional systems to boot and run the RHEL 10.2 Developer Preview depending on the hardware configuration of the board. For example, some members of the community have successfully booted the RHEL 10.2 RISC-V Developer Preview image on boards with the StarFive JH7110 and UltraRISC DP1000 processors, as well as QEMU, but compatibility with those systems is experimental and some tinkering will be required to get the image to run. It's important to note that drivers for onboard graphics are not included and the only hardware that has been tested by Red Hat is the SiFive HiFive Premier P550.

The refresh is available now on developers.redhat.com.

Red Hat continues to monitor and support the growth of the RISC-V ecosystem. RISC-V represents an open standard for the creation of CPU and accelerator design for the entire industry. Open standard hardware will naturally foster an ecosystem of open source software, and an open CPU architecture is a cornerstone of an open hardware platform. Red Hat continues its mission to support choice in the market, enabling open IT infrastructure for customers. RISC-V adoption is a choice that the market will make based on each segment's own criteria.

The early access to a developer preview of RHEL on such a popular platform is an example of the innovation that both Red Hat and SiFive represent to the industry. Customers who are evaluating RISC-V can use this preview as a guide to the relevance of this technology to their IT infrastructure as well as edge or embedded applications.

For more information, review the RHEL Developer Preview for RISC-V page

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About the author

Steve has extensive experience in the hardware to operating system interface, working at many hardware organizations prior to Red Hat.

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